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[23.128.96.18]) by mx.google.com with ESMTP id z14si28117613ilu.34.2021.11.08.03.17.22; Mon, 08 Nov 2021 03:17:36 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcdkim header.b=FIR2mo+3; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237035AbhKHGoz (ORCPT + 99 others); Mon, 8 Nov 2021 01:44:55 -0500 Received: from alexa-out.qualcomm.com ([129.46.98.28]:6190 "EHLO alexa-out.qualcomm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230364AbhKHGoy (ORCPT ); Mon, 8 Nov 2021 01:44:54 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; i=@quicinc.com; q=dns/txt; s=qcdkim; t=1636353731; x=1667889731; h=from:to:cc:subject:date:message-id:mime-version; bh=Nti7sHlIKPzEpHCUKOFQUUxAJwFZx5QFeH2k2h9zCCc=; b=FIR2mo+3V50oR4iQCh9hIA88C7xx/8uXR8FEnj4qBKlWhQxVPhqRiii6 5Zi+sCJxR1S0geEPC7ROYL2FKGC4clrNTBiMbUgFUVSj/HHW53Kk0xaIz O62EaH6aV1cOWozP+f3qnvmxgO7G0FeAXya2VgWFjxD422BMsVnnPnx0X w=; Received: from ironmsg08-lv.qualcomm.com ([10.47.202.152]) by alexa-out.qualcomm.com with ESMTP; 07 Nov 2021 22:42:10 -0800 X-QCInternal: smtphost Received: from nasanex01c.na.qualcomm.com ([10.47.97.222]) by ironmsg08-lv.qualcomm.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Nov 2021 22:42:09 -0800 Received: from nalasex01a.na.qualcomm.com (10.47.209.196) by nasanex01c.na.qualcomm.com (10.47.97.222) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.922.7; Sun, 7 Nov 2021 22:42:09 -0800 Received: from c-sanm-linux.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.922.7; Sun, 7 Nov 2021 22:42:04 -0800 From: Sandeep Maheswaram To: Rob Herring , Andy Gross , "Bjorn Andersson" , Greg Kroah-Hartman , Felipe Balbi , Stephen Boyd , Doug Anderson , "Matthias Kaehlcke" , Mathias Nyman CC: , , , , , , Sandeep Maheswaram Subject: [PATCH v2 0/3] Skip phy initialization for DWC3 USB Controllers Date: Mon, 8 Nov 2021 12:11:47 +0530 Message-ID: <1636353710-25582-1-git-send-email-quic_c_sanm@quicinc.com> X-Mailer: git-send-email 2.7.4 MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Runtime suspend of phy drivers was failing from DWC3 driver as runtime usage value is 2 because the phy is initialized from DWC3 core and HCD core. Some controllers like DWC3 and CDNS3 manage phy in their core drivers. This property can be set to avoid phy initialization in HCD core. v2: Updated the commit descriptions. Changed subject prefix from dwc to dwc3. Increased props array size. Sandeep Maheswaram (3): dt-bindings: usb: usb-xhci: Add bindings for usb-skip-phy-init property usb: host: xhci-plat: Add device property to set XHCI_SKIP_PHY_INIT quirk usb: dwc3: host: Set the property usb-skip-phy-init Documentation/devicetree/bindings/usb/usb-xhci.yaml | 4 ++++ drivers/usb/dwc3/host.c | 4 +++- drivers/usb/host/xhci-plat.c | 3 +++ 3 files changed, 10 insertions(+), 1 deletion(-) -- 2.7.4