Received: by 2002:a05:6a10:5bc5:0:0:0:0 with SMTP id os5csp6192704pxb; Mon, 8 Nov 2021 04:47:54 -0800 (PST) X-Google-Smtp-Source: ABdhPJyzMLeEdmjj3bQYqJWkisZ+GqGo124DS4O1sx1l9QLCI3rwC2CIi9+KXABJLmsTSi3rHydk X-Received: by 2002:a50:e08a:: with SMTP id f10mr108495878edl.319.1636375674456; Mon, 08 Nov 2021 04:47:54 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1636375674; cv=none; d=google.com; s=arc-20160816; b=kknfoUu7WRqOyu/yHBhZqt5lSVgLtH1ThjUxvDRnMORF8mfFHJ5yuJkD07aGHJ9qAZ 9uIlQETIituwYmCjphFDr8KXrTHygNxyrDYy3TIBgZ1jq9qvpV1zx9V7i1CXDGR4b2LR kgpXoz7p/hGXJ8B1jQ8lTrK2TGfcBAx6gI+HFP+1KF1y1yWjFlf8pmGFfje9ML414u16 oEpZWp+TZFXxX0ted/B0lgPwewPsUIEUPjjvAiSlfdiCCyZTdhBtwCNRamKtXElEMpvV aSE5xB0QTqT0H3ni7pXXXxuUSwPgRBTVW53qjSwOFmmhcqNUyL1WmTdLZmuLKCtCzGNV jLlg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:references:in-reply-to:message-id:date:subject :cc:to:from; bh=BONEY6JZCbdUJsbcnQv+ZRtE9ITFpn7xF5ClSb6zHRs=; b=foeMkUzcb1GiwrT8rj1P4QaJfJRqnHv9K7LlSWKEO9EKXm0kes7IaPnkVev+w+hsCe QKxwQ9vxJi43kCISh9gOI7bj5SkB6cfGTA1MU2LItrcj7HV92L62OhiZGtZZOegoHGCO nDazamA+uPX0ur6fE3dmimCvYtfAmyHoguSQRLCXbvtNtrxc2lWckcmBYw/dpzSfMxZG N0RlSpjGLWUIfouALkd2Pcu4cA8jsAC+zmaukVo92HqZl+rZd/ygXSuTQFFdmXQ9O6kG Ecouo2h4qnA/e0aP5WLGmc9iVjfcSJK+obEvNuJut7Mlf/dPNy+pt+5LIAHOtjoP4X5u UY/g== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id q11si30380590edd.16.2021.11.08.04.47.30; Mon, 08 Nov 2021 04:47:54 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238467AbhKHJsM (ORCPT + 99 others); Mon, 8 Nov 2021 04:48:12 -0500 Received: from mx.socionext.com ([202.248.49.38]:62305 "EHLO mx.socionext.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238285AbhKHJsF (ORCPT ); Mon, 8 Nov 2021 04:48:05 -0500 Received: from unknown (HELO iyokan2-ex.css.socionext.com) ([172.31.9.54]) by mx.socionext.com with ESMTP; 08 Nov 2021 18:45:14 +0900 Received: from mail.mfilter.local (m-filter-1 [10.213.24.61]) by iyokan2-ex.css.socionext.com (Postfix) with ESMTP id 7A62A206E704; Mon, 8 Nov 2021 18:45:14 +0900 (JST) Received: from 172.31.9.53 (172.31.9.53) by m-FILTER with ESMTP; Mon, 8 Nov 2021 18:45:14 +0900 Received: from yuzu2.css.socionext.com (yuzu2 [172.31.9.57]) by iyokan2.css.socionext.com (Postfix) with ESMTP id 57D689D68A; Mon, 8 Nov 2021 18:45:14 +0900 (JST) Received: from scorpio.e01.socionext.com (aries.syh.socionext.com [10.213.112.88]) by yuzu2.css.socionext.com (Postfix) with ESMTP id 3BCB0B6292; Mon, 8 Nov 2021 18:45:14 +0900 (JST) From: Sugaya Taichi To: Rob Herring Cc: Arnd Bergmann , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, orito.takao@socionext.com, sugaya.taichi@socionext.com, Masami Hiramatsu , Jassi Brar Subject: [PATCH 3/3] ARM: dts: milbeaut: set clock phandle to uart node Date: Mon, 8 Nov 2021 18:45:13 +0900 Message-Id: <1636364713-21451-4-git-send-email-sugaya.taichi@socionext.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1636364713-21451-1-git-send-email-sugaya.taichi@socionext.com> References: <1636364713-21451-1-git-send-email-sugaya.taichi@socionext.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Set clock phandle to uart node for Milbeaut M10V support. Signed-off-by: Sugaya Taichi --- arch/arm/boot/dts/milbeaut-m10v.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/boot/dts/milbeaut-m10v.dtsi b/arch/arm/boot/dts/milbeaut-m10v.dtsi index c800b13..e592fe0 100644 --- a/arch/arm/boot/dts/milbeaut-m10v.dtsi +++ b/arch/arm/boot/dts/milbeaut-m10v.dtsi @@ -85,6 +85,7 @@ reg = <0x1e700010 0x10>; interrupts = <0 141 0x4>, <0 149 0x4>; interrupt-names = "rx", "tx"; + clock = <&clk 2>; }; }; -- 2.7.4