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[209.85.221.171]) by smtp.gmail.com with ESMTPSA id d128sm3095209vsd.20.2021.11.08.01.32.34 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 08 Nov 2021 01:32:34 -0800 (PST) Received: by mail-vk1-f171.google.com with SMTP id p22so6149216vke.7; Mon, 08 Nov 2021 01:32:34 -0800 (PST) X-Received: by 2002:a05:6122:1350:: with SMTP id f16mr18817472vkp.26.1636363954170; Mon, 08 Nov 2021 01:32:34 -0800 (PST) MIME-Version: 1.0 References: <20211102161125.1144023-1-kernel@esmil.dk> <20211102161125.1144023-15-kernel@esmil.dk> In-Reply-To: <20211102161125.1144023-15-kernel@esmil.dk> From: Geert Uytterhoeven Date: Mon, 8 Nov 2021 10:32:23 +0100 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v3 14/16] serial: 8250_dw: Add StarFive JH7100 quirk To: Emil Renner Berthing Cc: linux-riscv , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , linux-clk , "open list:GPIO SUBSYSTEM" , "open list:SERIAL DRIVERS" , Palmer Dabbelt , Paul Walmsley , Rob Herring , Michael Turquette , Stephen Boyd , Thomas Gleixner , Marc Zyngier , Philipp Zabel , Linus Walleij , Greg Kroah-Hartman , Daniel Lezcano , Andy Shevchenko , Jiri Slaby , Maximilian Luz , Sagar Kadam , Drew Fustini , Michael Zhu , Fu Wei , Anup Patel , Atish Patra , Matteo Croce , Linux Kernel Mailing List Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Esmil, On Tue, Nov 2, 2021 at 5:12 PM Emil Renner Berthing wrote: > On the StarFive JH7100 RISC-V SoC the UART core clocks can't be set to > exactly 16 * 115200Hz and many other common bitrates. Trying this will > only result in a higher input clock, but low enough that the UART's > internal divisor can't come close enough to the baud rate target. > So rather than try to set the input clock it's better to skip the > clk_set_rate call and rely solely on the UART's internal divisor. > > Signed-off-by: Emil Renner Berthing Thanks for your patch! Reviewed-by: Geert Uytterhoeven > --- a/drivers/tty/serial/8250/8250_dw.c > +++ b/drivers/tty/serial/8250/8250_dw.c > @@ -414,6 +414,8 @@ static void dw8250_quirks(struct uart_port *p, struct dw8250_data *data) > > if (of_device_is_compatible(np, "marvell,armada-38x-uart")) > p->serial_out = dw8250_serial_out38x; > + if (of_device_is_compatible(np, "starfive,jh7100-uart")) > + p->set_termios = dw8250_do_set_termios; BTW, it would be great for a follow-up patch to get rid of all these of_device_is_compatible() checks, and start using dw8250_of_match[...].data instead. > > } else if (acpi_dev_present("APMC0D08", NULL, -1)) { > p->iotype = UPIO_MEM32; > @@ -696,6 +698,7 @@ static const struct of_device_id dw8250_of_match[] = { > { .compatible = "cavium,octeon-3860-uart" }, > { .compatible = "marvell,armada-38x-uart" }, > { .compatible = "renesas,rzn1-uart" }, > + { .compatible = "starfive,jh7100-uart" }, > { /* Sentinel */ } > }; Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds