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[209.85.222.49]) by smtp.gmail.com with ESMTPSA id g187sm854639vsc.10.2021.11.08.07.40.35 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 08 Nov 2021 07:40:35 -0800 (PST) Received: by mail-ua1-f49.google.com with SMTP id l43so32302428uad.4; Mon, 08 Nov 2021 07:40:35 -0800 (PST) X-Received: by 2002:ab0:15a1:: with SMTP id i30mr934716uae.122.1636386035060; Mon, 08 Nov 2021 07:40:35 -0800 (PST) MIME-Version: 1.0 References: <20211029124437.20721-1-prabhakar.mahadev-lad.rj@bp.renesas.com> <20211029124437.20721-6-prabhakar.mahadev-lad.rj@bp.renesas.com> In-Reply-To: <20211029124437.20721-6-prabhakar.mahadev-lad.rj@bp.renesas.com> From: Geert Uytterhoeven Date: Mon, 8 Nov 2021 16:40:24 +0100 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v2 5/5] pinctrl: renesas: pinctrl-rzg2l: Add support to get/set drive-strength and output-impedance-ohms To: Lad Prabhakar Cc: Linus Walleij , Rob Herring , "open list:GPIO SUBSYSTEM" , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , Linux Kernel Mailing List , Linux-Renesas , Prabhakar , Biju Das Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Prabhakar, On Fri, Oct 29, 2021 at 2:45 PM Lad Prabhakar wrote: > RZ/G2L supports two groups of pins Group-A and Group-B. For Group-A > pins drive-strength can be configured and for Group-B output-impedance > can be configured. > > This patch splits PIN_CFG_IOLH macro to PIN_CFG_IOLH_A/B and adds > support to get/set drive-strength and output-impedance-ohms for the > supported pins. > > Signed-off-by: Lad Prabhakar > Reviewed-by: Biju Das Thanks for your patch! > --- a/drivers/pinctrl/renesas/pinctrl-rzg2l.c > +++ b/drivers/pinctrl/renesas/pinctrl-rzg2l.c > @@ -501,7 +507,7 @@ static int rzg2l_pinctrl_pinconf_get(struct pinctrl_dev *pctldev, > unsigned int arg = 0; > unsigned long flags; > void __iomem *addr; > - u32 port = 0; > + u32 port = 0, reg; "unsigned int index", for symmetry with rzg2l_pinctrl_pinconf_set()? > u32 cfg = 0; > u8 bit = 0; > > @@ -549,6 +555,24 @@ static int rzg2l_pinctrl_pinconf_get(struct pinctrl_dev *pctldev, > break; > } > > + case PIN_CONFIG_DRIVE_STRENGTH: { > + if (!(cfg & PIN_CFG_IOLH_A)) > + return -EINVAL; > + > + reg = rzg2l_read_pin_config(pctrl, port_pin, IOLH(port), bit, IOLH_MASK); port_pin still under discussion, cfr. my comments for the other patches in this series. The rest looks good to me, so Reviewed-by: Geert Uytterhoeven Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds