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References: <20211029124437.20721-1-prabhakar.mahadev-lad.rj@bp.renesas.com> <20211029124437.20721-4-prabhakar.mahadev-lad.rj@bp.renesas.com>
In-Reply-To: <20211029124437.20721-4-prabhakar.mahadev-lad.rj@bp.renesas.com>
From:   Geert Uytterhoeven <geert@linux-m68k.org>
Date:   Mon, 8 Nov 2021 16:35:57 +0100
Message-ID: <CAMuHMdV+716v3SOLM4Sf6arK5jEPgtc0NSOU6nZXQGXUT+-+3Q@mail.gmail.com>
Subject: Re: [PATCH v2 3/5] pinctrl: renesas: pinctrl-rzg2l: Add support to
 get/set pin config for GPIO port pins
To:     Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Cc:     Geert Uytterhoeven <geert+renesas@glider.be>,
        Linus Walleij <linus.walleij@linaro.org>,
        Rob Herring <robh+dt@kernel.org>,
        "open list:GPIO SUBSYSTEM" <linux-gpio@vger.kernel.org>,
        "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" 
        <devicetree@vger.kernel.org>,
        Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
        Linux-Renesas <linux-renesas-soc@vger.kernel.org>,
        Prabhakar <prabhakar.csengg@gmail.com>,
        Biju Das <biju.das.jz@bp.renesas.com>
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Precedence: bulk

Hi Prabhakar,

On Fri, Oct 29, 2021 at 2:44 PM Lad Prabhakar
<prabhakar.mahadev-lad.rj@bp.renesas.com> wrote:
> Add support to get/set pin config for GPIO port pins.
>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>

Thanks for your patch!

> --- a/drivers/pinctrl/renesas/pinctrl-rzg2l.c
> +++ b/drivers/pinctrl/renesas/pinctrl-rzg2l.c

> @@ -495,6 +512,14 @@ static int rzg2l_pinctrl_pinconf_get(struct pinctrl_dev *pctldev,
>                 port = RZG2L_SINGLE_PIN_GET_PORT(*pin_data);
>                 cfg = RZG2L_SINGLE_PIN_GET_CFGS(*pin_data);
>                 bit = RZG2L_SINGLE_PIN_GET_BIT(*pin_data);
> +       } else {
> +               cfg = RZG2L_GPIO_PORT_GET_CFGS(*pin_data);
> +               port = RZG2L_PIN_ID_TO_PORT(_pin);
> +               bit = RZG2L_PIN_ID_TO_PIN(_pin);
> +               port_pin = true;

Instead of setting this flag, perhaps port should be adjusted?
Then rzg2l_r{ead,mw}_pin_config() don't have to care about that
anymore.

> +
> +               if (rzg2l_validate_gpio_pin(pctrl, *pin_data, port, bit))
> +                       return -EINVAL;
>         }
>
>         switch (param) {
> @@ -557,6 +582,14 @@ static int rzg2l_pinctrl_pinconf_set(struct pinctrl_dev *pctldev,
>                 port = RZG2L_SINGLE_PIN_GET_PORT(*pin_data);
>                 cfg = RZG2L_SINGLE_PIN_GET_CFGS(*pin_data);
>                 bit = RZG2L_SINGLE_PIN_GET_BIT(*pin_data);
> +       } else {
> +               cfg = RZG2L_GPIO_PORT_GET_CFGS(*pin_data);
> +               port = RZG2L_PIN_ID_TO_PORT(_pin);
> +               bit = RZG2L_PIN_ID_TO_PIN(_pin);
> +               port_pin = true;

Likewise.

> +
> +               if (rzg2l_validate_gpio_pin(pctrl, *pin_data, port, bit))
> +                       return -EINVAL;
>         }
>
>         for (i = 0; i < num_configs; i++) {

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds