Received: by 2002:a05:6a10:8395:0:0:0:0 with SMTP id n21csp252858pxh; Tue, 9 Nov 2021 10:08:58 -0800 (PST) X-Google-Smtp-Source: ABdhPJwaGmY6SWYcY3SXACxjosV7ZOAFW7kKUmJF65K/lMK/HHZHcnBo14Wqafd+HVvxnFH/OIb4 X-Received: by 2002:aa7:ce17:: with SMTP id d23mr12786248edv.264.1636481338324; Tue, 09 Nov 2021 10:08:58 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1636481338; cv=none; d=google.com; s=arc-20160816; b=0NDHTn7Fa1Kcn6aFH8RTAafOakyfJ5UivcdkwSETNcMfuLDnLVStb7ztkLQ+U1UMHH kcDVzpwm4dPWKVNlAR+nppDBolV/65OS9sacUjNMb6OzbW3xYBsvCnEnOw90YrdaOzro WB1fPnU2Kmwoov1paiyCZyXs07WD9v86o1D37QVKoKpEueuEWZ4TrWwdmJ915sVxBpud TPBtohpKR1HfrJGGANilp8IY9jexxEYYIazLSncG92xEmqWBsl6MKPw93EwmNf3o+asW Vmq6vNiO/mvKDkuS7XGYh4aSr+cVSfwKcIOeFGA/l87mVDcUcZPNH+eByMUdAVniHyld T+3g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:subject:message-id:date:from:in-reply-to :references:mime-version; bh=Yz8tM/z3N2e7EAzXLrtHRMyDGqdFNyhQg+TbKONS+ZA=; b=l/3cRFwXPf6qy8btUeEbU5pnwlYJsQnAWvN1F/7D2xUxmRJ9/OYuog+GJd2p7gBRv9 DEtPAjyk1HIhGTffNQMVCL+a6qOQjIbHTPsBza+idXndzafmAuN/7wqLlQqn12gQSZRa fSPxQG5D4dqHm7EjfW7DI/NvrhzPHgCkH+Bp8tPEKYqs2YnfK8NXNz+s/6+/ZcTo84cy 8L6oTV0esteAOseePqnaAYn5mzdidbzQjQ0HfzDUZGM0lJvFuhMdH+UO8AIvuXCI6CAt /mofplDWA8BQKbZK+PDUAWjVlTxJ2PQsK7z1vgYvau/4qKe0o4mjnGIbgaciR1R1NVEl B/oQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id hr4si43931154ejc.651.2021.11.09.10.08.33; Tue, 09 Nov 2021 10:08:58 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S242583AbhKIJbR (ORCPT + 99 others); Tue, 9 Nov 2021 04:31:17 -0500 Received: from mail-pg1-f175.google.com ([209.85.215.175]:39588 "EHLO mail-pg1-f175.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241297AbhKIJbQ (ORCPT ); Tue, 9 Nov 2021 04:31:16 -0500 Received: by mail-pg1-f175.google.com with SMTP id g184so17958406pgc.6; Tue, 09 Nov 2021 01:28:31 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=Yz8tM/z3N2e7EAzXLrtHRMyDGqdFNyhQg+TbKONS+ZA=; b=4bSbSmv8kEHpj6aP/B7nHqiBEUoUqrSIQ7MfuTKndA6u8t/L1A+zUxT0zLGFPVlIFH OA4qjotLeOHgDseRpuNARX+49s32XeYazckCoCkpQxEyHPi37Tz0Oag0+jmvO+56ObD9 /6Htjfs/Y2o+wFlc273iUK7gKO/UZjaiRCYHdXCEPISIiX+T0Fv769Z90qqj0SpdQajR gvOsEqNPdSMUgDdr99JcRTdJ0qFRi8bV0AB4lT9tOdKD2tol5GBFdtcCCi/lvU/DCIJC jk+K/r0P7RDTeMzBqxsrv+bl3jq38qIbE3wSnkCjldGAUYPie5D3sc0IcJjjzrQcU/Fi Mzsw== X-Gm-Message-State: AOAM5334B28TLT0z58SVWUrN3u63ZYwiJvFRgGcVv0s8jMjt6uCJLjQX pvYGek0dP6pXnDNSaO3hav+mR0+4H5eV639bVjg= X-Received: by 2002:a63:b11:: with SMTP id 17mr4847235pgl.51.1636450110959; Tue, 09 Nov 2021 01:28:30 -0800 (PST) MIME-Version: 1.0 References: <20211102161125.1144023-1-kernel@esmil.dk> <20211102161125.1144023-10-kernel@esmil.dk> In-Reply-To: From: Emil Renner Berthing Date: Tue, 9 Nov 2021 10:28:20 +0100 Message-ID: Subject: Re: [PATCH v3 09/16] reset: starfive-jh7100: Add StarFive JH7100 reset driver To: Andy Shevchenko Cc: Yury Norov , linux-riscv , devicetree , linux-clk , "open list:GPIO SUBSYSTEM" , "open list:SERIAL DRIVERS" , Palmer Dabbelt , Paul Walmsley , Rob Herring , Michael Turquette , Stephen Boyd , Thomas Gleixner , Marc Zyngier , Philipp Zabel , Linus Walleij , Greg Kroah-Hartman , Daniel Lezcano , Jiri Slaby , Maximilian Luz , Sagar Kadam , Drew Fustini , Geert Uytterhoeven , Michael Zhu , Fu Wei , Anup Patel , Atish Patra , Matteo Croce , Linux Kernel Mailing List Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, 8 Nov 2021 at 10:18, Andy Shevchenko wrote: > On Thu, Nov 04, 2021 at 01:15:46PM +0100, Emil Renner Berthing wrote: > > On Tue, 2 Nov 2021 at 22:17, Emil Renner Berthing wrote: > > ... > > > I'd really like to understand your reasoning here. As far as I can > > tell reading 2 adjacent 32bit registers with a 64bit read as you're > > proposing is exactly what would cause endian issues. Eg. on little > > endian you'd get reg0 | reg1 << 32 whereas on big-endian you'd get > > reg0 << 32 | reg1. > > Nope, it won't. The endianess is a property of both CPU and device. > > The I/O accessors, such as readl()/writel() and iowrtieXX()/ioreadXX() > are _always_ LE. Aha! Thanks, that's the bit I was missing.