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[23.128.96.18]) by mx.google.com with ESMTP id 1si27799675ilz.178.2021.11.09.16.01.14; Tue, 09 Nov 2021 16:01:28 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@gmail.com header.s=20210112 header.b=c7paMbIK; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235896AbhKIP2C (ORCPT + 97 others); Tue, 9 Nov 2021 10:28:02 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41386 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235782AbhKIP2B (ORCPT ); Tue, 9 Nov 2021 10:28:01 -0500 Received: from mail-yb1-xb32.google.com (mail-yb1-xb32.google.com [IPv6:2607:f8b0:4864:20::b32]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F20FCC061764; Tue, 9 Nov 2021 07:25:14 -0800 (PST) Received: by mail-yb1-xb32.google.com with SMTP id 131so53835335ybc.7; Tue, 09 Nov 2021 07:25:14 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=1YtPKMAKhh4yr7fG5V9nmBRI32AwNngOJNQ80JUITj4=; b=c7paMbIK2hqj6wQ/mm5GGvSBbBPqXannMb3ctv68OXdJsWNoG39Na33zL9sKXHa6aV 7wEwsjzCULgVq2m+aITEDLuoilL4uN8hPuG9nN4lvN7p4vigwPwk5m3V89ON+CjBCw9/ MUiikHB93jM4FhWuDcIDkpXYBbIbwszcGJ1D3jpbUR764AQ3V+LLL8kCyx6SZ18BM52G vDGY0dUx0hCviLLzfpMOUC+8PpnFmlrMjcVPJ+cvnSM9SvdrYof+EzGSwP/fVPs3UfpP v3+QAkN7F7TdEcXRZ3TLnRJeY/ugOlrRJbp/Q0ofpyL5XnksiWaQrZHYTmfNgIMid7QP 3CKw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=1YtPKMAKhh4yr7fG5V9nmBRI32AwNngOJNQ80JUITj4=; b=TMXAlaBg7IUmNI5WjPfJt2OXMIE3WcM/d0aunaG9Udy7n4+1l5xrDoBTjgxkFGuYP/ FXe2pklolLU0SIHER+njWQEVS10c0VH7tn9pD98LlsjRYtP5u/Tr77RLtaeEgK+2SMaJ DvJlf7Fy7N9WTLLO10G5bNP+RWZJq+JQdoqnzvZWZ2MagAHp7REKTwINCZi+GTLDMyHa /SszQ0ys9UWjvCiFth4XkWyES0xXHp+54bXZFDPePLfJF88XzEKyAFvz1j+Ut7kkCp8w bE1H5qJ/U6Ohk+yCTokEuRvkJeYT96S/+XUEoCM+UiOIO5qSG6xzbd6mUanqQ4UknDAn Uxjg== X-Gm-Message-State: AOAM530oqT6JJ4NkqAnuuS1xJ0v7VUHAlCP9KtyEWQmT38/TN84C0kAP AbADmZ6VBQo5JF93jRj9ewZ/o3gZVfdkkF0f9/2l2PS37llN1Q== X-Received: by 2002:a5b:783:: with SMTP id b3mr8787410ybq.328.1636471514166; Tue, 09 Nov 2021 07:25:14 -0800 (PST) MIME-Version: 1.0 References: <20211029124437.20721-1-prabhakar.mahadev-lad.rj@bp.renesas.com> <20211029124437.20721-4-prabhakar.mahadev-lad.rj@bp.renesas.com> In-Reply-To: From: "Lad, Prabhakar" Date: Tue, 9 Nov 2021 15:24:48 +0000 Message-ID: Subject: Re: [PATCH v2 3/5] pinctrl: renesas: pinctrl-rzg2l: Add support to get/set pin config for GPIO port pins To: Geert Uytterhoeven Cc: Lad Prabhakar , Linus Walleij , Rob Herring , "open list:GPIO SUBSYSTEM" , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , Linux Kernel Mailing List , Linux-Renesas , Biju Das Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Geert, On Tue, Nov 9, 2021 at 3:00 PM Geert Uytterhoeven wrote: > > Hi Prabhakar, > > On Tue, Nov 9, 2021 at 3:31 PM Lad, Prabhakar > wrote: > > On Mon, Nov 8, 2021 at 3:36 PM Geert Uytterhoeven wrote: > > > On Fri, Oct 29, 2021 at 2:44 PM Lad Prabhakar > > > wrote: > > > > Add support to get/set pin config for GPIO port pins. > > > > > > > > Signed-off-by: Lad Prabhakar > > > > Reviewed-by: Biju Das > > > > > > Thanks for your patch! > > > > > > > --- a/drivers/pinctrl/renesas/pinctrl-rzg2l.c > > > > +++ b/drivers/pinctrl/renesas/pinctrl-rzg2l.c > > > > > > > @@ -495,6 +512,14 @@ static int rzg2l_pinctrl_pinconf_get(struct pinctrl_dev *pctldev, > > > > port = RZG2L_SINGLE_PIN_GET_PORT(*pin_data); > > > > cfg = RZG2L_SINGLE_PIN_GET_CFGS(*pin_data); > > > > bit = RZG2L_SINGLE_PIN_GET_BIT(*pin_data); > > > > + } else { > > > > + cfg = RZG2L_GPIO_PORT_GET_CFGS(*pin_data); > > > > + port = RZG2L_PIN_ID_TO_PORT(_pin); > > > > + bit = RZG2L_PIN_ID_TO_PIN(_pin); > > > > + port_pin = true; > > > > > > Instead of setting this flag, perhaps port should be adjusted? > > > > Something like below? > > > > #define RZG2L_PORT_START_OFFSET 0x10 > > > > port = RZG2L_PIN_ID_TO_PORT_pin) + RZG2L_PORT_START_OFFSET; > > rzg2l_validate_gpio_pin(pctrl, *pin_data, port - RZG2L_PORT_START_OFFSET, bit) > > Or adjust port after the call to rzg2l_validate_gpio_pin(), to avoid adding > the offset first, and subtracting it again for calling the latter? > > > and rename port -> port_offset in rzg2l_pinctrl_pinconf_get/set > > That makes sense. Currently "port" has two meanings: it can mean > either the GPIO port index, or the global register index covering both > single function pin groups and GPIO port indices. > RZG2L_SINGLE_PIN_GET_PORT() returns the latter. > RZG2L_PIN_ID_TO_PORT() returns the former, thus needing an extra offset > to convert to the global register index. > for symmetry will rename the below: RZG2L_SINGLE_PIN_GET_PORT -> RZG2L_SINGLE_PIN_GET_PORT_OFFSET Introduce a new macros: #define RZG2L_PORT_START_OFFSET 0x10 #define RZG2L_PIN_ID_TO_PORT_OFFSET(id) (((id) / RZG2L_PINS_PER_PORT) + RZG2L_PORT_START_OFFSET) And use the above two in rzg2l_pinctrl_pinconf_get/set along with renaming port -> port_offset And for rzg2l_validate_gpio_pin() will use below instead: rzg2l_validate_gpio_pin(pctrl, *pin_data, RZG2L_PIN_ID_TO_PORT(_pin), bit); > > Or > > would you prefer to change the RZG2L_PIN_ID_TO_PORT macro and adjust > > the entire file? > > Changing RZG2L_PIN_ID_TO_PORT() would imply changing all macros > accessing GPIO registers, and is thus quite intrusive. > Agreed, I will drop this option. Cheers, Prabhakar > > > Then rzg2l_r{ead,mw}_pin_config() don't have to care about that > > > anymore. > > > > > Agreed. > > Gr{oetje,eeting}s, > > Geert > > -- > Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org > > In personal conversations with technical people, I call myself a hacker. But > when I'm talking to journalists I just say "programmer" or something like that. > -- Linus Torvalds