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[23.128.96.18]) by mx.google.com with ESMTP id o2si35757262pll.454.2021.11.10.03.16.46; Wed, 10 Nov 2021 03:16:59 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231331AbhKJLSO (ORCPT + 99 others); Wed, 10 Nov 2021 06:18:14 -0500 Received: from mail-pg1-f181.google.com ([209.85.215.181]:41734 "EHLO mail-pg1-f181.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231131AbhKJLSL (ORCPT ); Wed, 10 Nov 2021 06:18:11 -0500 Received: by mail-pg1-f181.google.com with SMTP id n23so1947939pgh.8; Wed, 10 Nov 2021 03:15:24 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=ClY6fmDoOxt9WGtpyKfVteeYzW6rEuh6CcP1PbPjKLs=; b=7KS+mc/zYzu8kWe1NUQc4jnk/Sy956byztMcWbM7RwvQFiOJVQl5fUoE9OjRatzH+A xbuPCaaBeT7YGhm1j2Pu152V0l0D3FfYlqSizNg434clsmGbd8M2v05th5sdIYWANjGP gDvr8dnVuLq9zfA+CwVlYL/Iwe9aLTR0XQpu+9RHFFvU11nNnjssGiPg7dqRLhcRsZYT oVWmZG9ZSHZZJcHzrDGrWZc3TtShH0LkftqjxanVT3X6uD51vHCEylctf1e2tdauMj41 XoUt8seXiqi+IKvlSGy84rJ4iDlgmbz99QX6EnFgQMMXRKMWFAA2Ius+GttzVf3bML2g 31eg== X-Gm-Message-State: AOAM530IrVhFzYkUz0Itl9p+iN/zp2Ei/mRG9ppVE/UZua911IMQ6hYJ gJpJhXOPTPMP6TSQL24Fqc6fZtJOhE5Tdvew5+E= X-Received: by 2002:aa7:91c5:0:b0:49f:a400:9771 with SMTP id z5-20020aa791c5000000b0049fa4009771mr15317197pfa.79.1636542923673; Wed, 10 Nov 2021 03:15:23 -0800 (PST) MIME-Version: 1.0 References: <20211102161125.1144023-1-kernel@esmil.dk> <20211102161125.1144023-13-kernel@esmil.dk> In-Reply-To: From: Emil Renner Berthing Date: Wed, 10 Nov 2021 12:15:12 +0100 Message-ID: Subject: Re: [PATCH v3 12/16] pinctrl: starfive: Add pinctrl driver for StarFive SoCs To: Andy Shevchenko Cc: Linus Walleij , linux-riscv , devicetree , linux-clk , "open list:GPIO SUBSYSTEM" , "open list:SERIAL DRIVERS" , Palmer Dabbelt , Paul Walmsley , Rob Herring , Michael Turquette , Stephen Boyd , Thomas Gleixner , Marc Zyngier , Philipp Zabel , Greg Kroah-Hartman , Daniel Lezcano , Jiri Slaby , Maximilian Luz , Sagar Kadam , Drew Fustini , Geert Uytterhoeven , Michael Zhu , Fu Wei , Anup Patel , Atish Patra , Matteo Croce , Linux Kernel Mailing List , Huan Feng Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, 10 Nov 2021 at 09:05, Andy Shevchenko wrote: > On Tue, Nov 09, 2021 at 10:04:24PM +0100, Emil Renner Berthing wrote: > > On Tue, 9 Nov 2021 at 21:29, Linus Walleij wrote: > > > On Tue, Nov 9, 2021 at 10:40 AM Emil Renner Berthing wrote: > > ... > > > No, I agree. I think it's only that Andy wasn't sure if these interim > > states might be meaningful/useful. > > Exactly. Because HW could behave differently. Right. But I think we've now established that what is described in the device tree is the state the pins should be in after the function has been called, eg. only the reduction matters, and any interim states would just be a byproduct of storing the state in the configs list. > > > And if it is possible > > > to write DTS files that have states and sequence requirements, > > > these should be caught in validation. Should be. > > -- > With Best Regards, > Andy Shevchenko > > > > _______________________________________________ > linux-riscv mailing list > linux-riscv@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-riscv