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[188.153.110.208]) by smtp.gmail.com with ESMTPSA id g10sm1341017edr.56.2021.11.03.06.53.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 03 Nov 2021 06:53:16 -0700 (PDT) From: Tommaso Merciai Cc: tomm.merciai@gmail.com, Rob Herring , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , Lucas Stach , Joakim Zhang , Frieder Schrempf , Alice Guo , Peng Fan , Adam Ford , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2] arm64: dts: imx8mm: Add NOC node Date: Wed, 3 Nov 2021 14:53:11 +0100 Message-Id: <20211103135313.6428-1-tomm.merciai@gmail.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit To: unlisted-recipients:; (no To-header on input) Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add support for dynamic frequency scaling of the main NOC configuration on imx8mm. References: - i.MX 8M Mini Applications Processor RM, Rev. 3, 11/2020 - f18e6d573b80 arm64: dts: imx8mq: Add NOC node - 912b9dacf3f0 arm64: dts: imx8mq: increase NOC clock to 800 MHz - https://source.codeaurora.org/external/imx/linux-imx/tree/arch/ \ arm64/boot/dts/freescale/imx8mm.dtsi?h=lf-5.10.y --- Changes since v1: - Fix noc_opp_table frequencies taking NXP bsp as reference - Add reference link to nxp imx8mm dtsi on commit body arch/arm64/boot/dts/freescale/imx8mm.dtsi | 25 +++++++++++++++++++++++ 1 file changed, 25 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi index c2f3f118f82e..1bcc5e361ca3 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi @@ -719,6 +719,31 @@ pgc_mipi: power-domain@11 { }; }; + noc: interconnect@32700000 { + compatible = "fsl,imx8mm-noc", "fsl,imx8m-noc"; + reg = <0x32700000 0x100000>; + clocks = <&clk IMX8MM_CLK_NOC>; + fsl,ddrc = <&ddrc>; + #interconnect-cells = <1>; + operating-points-v2 = <&noc_opp_table>; + + noc_opp_table: opp-table { + compatible = "operating-points-v2"; + + opp-150M { + opp-hz = /bits/ 64 <150000000>; + }; + + opp-375M { + opp-hz = /bits/ 64 <375000000>; + }; + + opp-750M { + opp-hz = /bits/ 64 <750000000>; + }; + }; + }; + aips2: bus@30400000 { compatible = "fsl,aips-bus", "simple-bus"; reg = <0x30400000 0x400000>; -- 2.25.1