Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3E03EC433F5 for ; Thu, 11 Nov 2021 07:12:40 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 288A06124C for ; Thu, 11 Nov 2021 07:12:40 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232002AbhKKHPZ (ORCPT ); Thu, 11 Nov 2021 02:15:25 -0500 Received: from mailgw02.mediatek.com ([210.61.82.184]:36754 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S231528AbhKKHPO (ORCPT ); Thu, 11 Nov 2021 02:15:14 -0500 X-UUID: abdc8927094e46c38db6e9f4b8baf85a-20211111 X-UUID: abdc8927094e46c38db6e9f4b8baf85a-20211111 Received: from mtkexhb02.mediatek.inc [(172.21.101.103)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 1310021455; Thu, 11 Nov 2021 15:12:21 +0800 Received: from mtkmbs10n1.mediatek.inc (172.21.101.34) by mtkmbs10n1.mediatek.inc (172.21.101.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.792.15; Thu, 11 Nov 2021 15:12:21 +0800 Received: from localhost.localdomain (10.17.3.154) by mtkmbs10n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.15 via Frontend Transport; Thu, 11 Nov 2021 15:12:19 +0800 From: Biao Huang To: , Jakub Kicinski , Rob Herring CC: Matthias Brugger , Giuseppe Cavallaro , Alexandre Torgue , Jose Abreu , Maxime Coquelin , Biao Huang , , , , , , , , Subject: [PATCH v2 2/5] net: stmmac: dwmac-mediatek: Reuse more common features Date: Thu, 11 Nov 2021 15:12:11 +0800 Message-ID: <20211111071214.21027-3-biao.huang@mediatek.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211111071214.21027-1-biao.huang@mediatek.com> References: <20211111071214.21027-1-biao.huang@mediatek.com> MIME-Version: 1.0 Content-Transfer-Encoding: 7BIT Content-Type: text/plain; charset=US-ASCII X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This patch makes dwmac-mediatek reuse more features supported by stmmac_platform.c. Signed-off-by: Biao Huang --- .../ethernet/stmicro/stmmac/dwmac-mediatek.c | 32 +++++++++---------- 1 file changed, 15 insertions(+), 17 deletions(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c index 157ff655c85e..6ea972e96665 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c @@ -335,22 +335,20 @@ static int mediatek_dwmac_init(struct platform_device *pdev, void *priv) const struct mediatek_dwmac_variant *variant = plat->variant; int ret; - ret = dma_set_mask_and_coherent(plat->dev, DMA_BIT_MASK(variant->dma_bit_mask)); - if (ret) { - dev_err(plat->dev, "No suitable DMA available, err = %d\n", ret); - return ret; - } - - ret = variant->dwmac_set_phy_interface(plat); - if (ret) { - dev_err(plat->dev, "failed to set phy interface, err = %d\n", ret); - return ret; + if (variant->dwmac_set_phy_interface) { + ret = variant->dwmac_set_phy_interface(plat); + if (ret) { + dev_err(plat->dev, "failed to set phy interface, err = %d\n", ret); + return ret; + } } - ret = variant->dwmac_set_delay(plat); - if (ret) { - dev_err(plat->dev, "failed to set delay value, err = %d\n", ret); - return ret; + if (variant->dwmac_set_delay) { + ret = variant->dwmac_set_delay(plat); + if (ret) { + dev_err(plat->dev, "failed to set delay value, err = %d\n", ret); + return ret; + } } ret = clk_bulk_prepare_enable(plat->num_clks_to_config, plat->clks); @@ -423,15 +421,15 @@ static int mediatek_dwmac_probe(struct platform_device *pdev) return PTR_ERR(plat_dat); plat_dat->interface = priv_plat->phy_mode; - plat_dat->has_gmac4 = 1; - plat_dat->has_gmac = 0; - plat_dat->pmt = 0; + plat_dat->use_phy_wol = 1; plat_dat->riwt_off = 1; plat_dat->maxmtu = ETH_DATA_LEN; + plat_dat->addr64 = priv_plat->variant->dma_bit_mask; plat_dat->bsp_priv = priv_plat; plat_dat->init = mediatek_dwmac_init; plat_dat->exit = mediatek_dwmac_exit; plat_dat->clks_config = mediatek_dwmac_clks_config; + mediatek_dwmac_init(pdev, priv_plat); ret = stmmac_dvr_probe(&pdev->dev, plat_dat, &stmmac_res); -- 2.25.1