Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 290B4C4332F for ; Fri, 12 Nov 2021 21:30:42 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 0AEED610F8 for ; Fri, 12 Nov 2021 21:30:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235769AbhKLVdc (ORCPT ); Fri, 12 Nov 2021 16:33:32 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52404 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235748AbhKLVda (ORCPT ); Fri, 12 Nov 2021 16:33:30 -0500 Received: from mail-ot1-x334.google.com (mail-ot1-x334.google.com [IPv6:2607:f8b0:4864:20::334]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2BA8CC0613F5 for ; Fri, 12 Nov 2021 13:30:39 -0800 (PST) Received: by mail-ot1-x334.google.com with SMTP id h12-20020a056830034c00b0055c8458126fso15887110ote.0 for ; Fri, 12 Nov 2021 13:30:39 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20210112; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=+vmT47JswBq7qxvW2mmjE/g946I5saxbuX5b7gNLFL4=; b=D+gcCXh1f960budU8lRnqkEeApuI8XhOqtSVvs0dvBafahJkfh0OCX/v6oi/L8uoIW h0ADo3uvGEiLXn1ziPjvl9m3NKy8i2nrGKIggbclcW73xbKNNvuhwTbPubCSDReUis3c eIrpTM53tPPkO6JjyiG+rasTsXGxT6j7LwGtTz0Rnpj2ZRHB4l6QGMWQXelwdpSTtS+M QEqML6xNRvBqkTktfaXaPii0CI20inBmaYdX4SSk2vXeTV+TI2ekReL3GTR2Jo8Txurw Bzu5soH9DfgA2BLQiucG2RibYEFf4Ht0LphtU4tl7FvlSOabHfHCqnoLbj7IQ0xlIJTV AQyw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=+vmT47JswBq7qxvW2mmjE/g946I5saxbuX5b7gNLFL4=; b=kVhsDzXy6RXA4x7gf88qCL70H78c59WX5yt9n/SpL1NCHyCOU4XqVbwsDAD2JuAx7c WsmUiHVhXD4bnjTrWU9UnEhR4ECqby0vjZKQdCtT13JNBaetmflWkTZ3uIkCyahTiRDt bQ66lM3XbJ6NfnCLot6cs23fh5GdMyu6G6NcqMMhSF0j0VsluupDuZCUcdA3KUWVVKaw xWaliljL0ga/IB0Wb73NhzUdJ33lUETkARHD3KFkewO7Hr5YSB20dHbHCPsY+CGs9gxK cdi1SPqCS1ovCOylTNDiraMYjI2DTdKJj/hUZbKC/Q3uUv9cRaPYYqKfuHgfzodcn2IE mwGw== X-Gm-Message-State: AOAM533nTqIMN9PbGo49WphNu33FMuhc0LLvhPbAnDpEe8sMljisxWp2 0db6yPNMYGVd4W60rqUVD3oNbQ7NAV16WqKZ+juiEg== X-Google-Smtp-Source: ABdhPJyx1AWCSNjtqlponw22EGcsSL4a/s3aR2bIU6ixr3xAwW099I1ZHWbBZZx2PhIrAjcNg3Rs+YuMZQEXWd8m6is= X-Received: by 2002:a9d:ed6:: with SMTP id 80mr14812790otj.35.1636752638202; Fri, 12 Nov 2021 13:30:38 -0800 (PST) MIME-Version: 1.0 References: <20210820155918.7518-1-brijesh.singh@amd.com> <061ccd49-3b9f-d603-bafd-61a067c3f6fa@intel.com> In-Reply-To: From: Marc Orr Date: Fri, 12 Nov 2021 13:30:27 -0800 Message-ID: Subject: Re: [PATCH Part2 v5 00/45] Add AMD Secure Nested Paging (SEV-SNP) Hypervisor Support To: Sean Christopherson Cc: Borislav Petkov , Dave Hansen , Peter Gonda , Brijesh Singh , x86@kernel.org, linux-kernel@vger.kernel.org, kvm@vger.kernel.org, linux-coco@lists.linux.dev, linux-mm@kvack.org, linux-crypto@vger.kernel.org, Thomas Gleixner , Ingo Molnar , Joerg Roedel , Tom Lendacky , "H. Peter Anvin" , Ard Biesheuvel , Paolo Bonzini , Vitaly Kuznetsov , Wanpeng Li , Jim Mattson , Andy Lutomirski , Dave Hansen , Sergio Lopez , Peter Zijlstra , Srinivas Pandruvada , David Rientjes , Dov Murik , Tobin Feldman-Fitzthum , Michael Roth , Vlastimil Babka , "Kirill A . Shutemov" , Andi Kleen , tony.luck@intel.com, sathyanarayanan.kuppuswamy@linux.intel.com Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Nov 12, 2021 at 12:38 PM Sean Christopherson wrote: > > On Fri, Nov 12, 2021, Borislav Petkov wrote: > > On Fri, Nov 12, 2021 at 07:48:17PM +0000, Sean Christopherson wrote: > > > Yes, but IMO inducing a fault in the guest because of _host_ bug is wrong. > > > > What do you suggest instead? > > Let userspace decide what is mapped shared and what is mapped private. The kernel > and KVM provide the APIs/infrastructure to do the actual conversions in a thread-safe > fashion and also to enforce the current state, but userspace is the control plane. > > It would require non-trivial changes in userspace if there are multiple processes > accessing guest memory, e.g. Peter's networking daemon example, but it _is_ fully > solvable. The exit to userspace means all three components (guest, kernel, > and userspace) have full knowledge of what is shared and what is private. There > is zero ambiguity: > > - if userspace accesses guest private memory, it gets SIGSEGV or whatever. > - if kernel accesses guest private memory, it does BUG/panic/oops[*] > - if guest accesses memory with the incorrect C/SHARED-bit, it gets killed. > > This is the direction KVM TDX support is headed, though it's obviously still a WIP. > > And ideally, to avoid implicit conversions at any level, hardware vendors' ABIs > define that: > > a) All convertible memory, i.e. RAM, starts as private. > b) Conversions between private and shared must be done via explicit hypercall. > > Without (b), userspace and thus KVM have to treat guest accesses to the incorrect > type as implicit conversions. > > [*] Sadly, fully preventing kernel access to guest private is not possible with > TDX, especially if the direct map is left intact. But maybe in the future > TDX will signal a fault instead of poisoning memory and leaving a #MC mine. In this proposal, consider a guest driver instructing a device to DMA write a 1 GB memory buffer. A well-behaved guest driver will ensure that the entire 1 GB is marked shared. But what about a malicious or buggy guest? Let's assume a bad guest driver instructs the device to write guest private memory. So now, the virtual device, which might be implemented as some host side process, needs to (1) check and lock all 4k constituent RMP entries (so they're not converted to private while the DMA write is taking palce), (2) write the 1 GB buffer, and (3) unlock all 4 k constituent RMP entries? If I'm understanding this correctly, then the synchronization will be prohibitively expensive.