Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B292DC4321E for ; Sat, 13 Nov 2021 02:40:27 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 8E67F60F4F for ; Sat, 13 Nov 2021 02:40:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235638AbhKMCnJ (ORCPT ); Fri, 12 Nov 2021 21:43:09 -0500 Received: from linux.microsoft.com ([13.77.154.182]:54524 "EHLO linux.microsoft.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235267AbhKMCnG (ORCPT ); Fri, 12 Nov 2021 21:43:06 -0500 Received: from thelio.attlocal.net (107-203-255-60.lightspeed.sntcca.sbcglobal.net [107.203.255.60]) by linux.microsoft.com (Postfix) with ESMTPSA id 55ABE20C3638; Fri, 12 Nov 2021 18:40:14 -0800 (PST) DKIM-Filter: OpenDKIM Filter v2.11.0 linux.microsoft.com 55ABE20C3638 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.microsoft.com; s=default; t=1636771214; bh=iwG31g5mjsx5d428UWqT3L+bkbto4f+JS/NHiofGZk8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=syHqIx/HsPQ2FoT0vnkdn7KtcwxK3W29aJZfE8Uicy4YhxbcILKNegc5dLcjrnuxt wbxk2XtprdumeskL+hjvzJ+4kHCkIzXDudFG4hm7NYdnjvRyHUgeGxIz5mzapCJ6X7 OtbDIBDjenv42zNp5v1smUEDLx58LSH1zuQA1cqk= From: Katherine Perez To: Andy Gross , Bjorn Andersson , Rob Herring , Vinod Koul Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [RFC PATCH v2 1/4] arm64: dts: qcom: sm8150: add dispcc node Date: Fri, 12 Nov 2021 18:39:52 -0800 Message-Id: <20211113023955.105989-2-kaperez@linux.microsoft.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20211113023955.105989-1-kaperez@linux.microsoft.com> References: <20211113023955.105989-1-kaperez@linux.microsoft.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add the display clock controller node to sm8150. Reviewed-by: Konrad Dybcio Signed-off-by: Katherine Perez --- Changes since v1: - Picked up Konrad's Reviewed-by arch/arm64/boot/dts/qcom/sm8150.dtsi | 25 +++++++++++++++++++++++++ 1 file changed, 25 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi index 81b4ff2cc4cd..ee40af469fab 100644 --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi @@ -9,6 +9,7 @@ #include #include #include +#include #include #include #include @@ -3260,6 +3261,30 @@ camnoc_virt: interconnect@ac00000 { qcom,bcm-voters = <&apps_bcm_voter>; }; + dispcc: clock-controller@af00000 { + compatible = "qcom,sm8150-dispcc"; + reg = <0 0x0af00000 0 0x10000>; + power-domains = <&rpmhpd SM8150_MMCX>; + required-opps = <&rpmhpd_opp_low_svs>; + clocks = <&rpmhcc RPMH_CXO_CLK>, + <0>, + <0>, + <0>, + <0>, + <0>, + <0>; + clock-names = "bi_tcxo", + "dsi0_phy_pll_out_byteclk", + "dsi0_phy_pll_out_dsiclk", + "dsi1_phy_pll_out_byteclk", + "dsi1_phy_pll_out_dsiclk", + "dp_phy_pll_link_clk", + "dp_phy_pll_vco_div_clk"; + #clock-cells = <1>; + #reset-cells = <1>; + #power-domain-cells = <1>; + }; + aoss_qmp: power-controller@c300000 { compatible = "qcom,sm8150-aoss-qmp"; reg = <0x0 0x0c300000 0x0 0x400>; -- 2.31.1