Date:   Sun, 14 Nov 2021 23:01:17 -0800
From:   Christoph Hellwig <hch@infradead.org>
To:     "Saheed O. Bolarinwa" <refactormyself@gmail.com>
Cc:     helgaas@kernel.org, linux-pci@vger.kernel.org,
        linux-kernel@vger.kernel.org
Subject: Re: [RFC PATCH v4 2/4] PCI/ASPM: Do not cache link latencies
Message-ID: <YZIFvZzdajJf3iTU@infradead.org>
References: <20211106175305.25565-1-refactormyself@gmail.com>
 <20211106175305.25565-3-refactormyself@gmail.com>
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On Sat, Nov 06, 2021 at 06:53:03PM +0100, Saheed O. Bolarinwa wrote:
> The latencies of the upstream and downstream are calculated within
> pcie_aspm_cap_init() and cached in struct pcie_link_state.latency_*
> These values are only used in pcie_aspm_check_latency() where they are
> compared with the acceptable latencies on the link.
> 
> - remove `latency_*` entries from struct pcie_link_state.
> - calculate the latencies directly where they are needed.
> 
> Signed-off-by: Saheed O. Bolarinwa <refactormyself@gmail.com>
> ---
>  drivers/pci/pcie/aspm.c | 25 ++++++++++++++-----------
>  1 file changed, 14 insertions(+), 11 deletions(-)
> 
> diff --git a/drivers/pci/pcie/aspm.c b/drivers/pci/pcie/aspm.c
> index a6d89c2c5b60..9e74df7b9dc0 100644
> --- a/drivers/pci/pcie/aspm.c
> +++ b/drivers/pci/pcie/aspm.c
> @@ -66,9 +66,6 @@ struct pcie_link_state {
>  	u32 clkpm_default:1;		/* Default Clock PM state by BIOS */
>  	u32 clkpm_disable:1;		/* Clock PM disabled */
>  
> -	/* Exit latencies */
> -	struct aspm_latency latency_up;	/* Upstream direction exit latency */
> -	struct aspm_latency latency_dw;	/* Downstream direction exit latency */
>  	/*
>  	 * Endpoint acceptable latencies. A pcie downstream port only
>  	 * has one slot under it, so at most there are 8 functions.
> @@ -392,7 +389,8 @@ static void encode_l12_threshold(u32 threshold_us, u32 *scale, u32 *value)
>  
>  static void pcie_aspm_check_latency(struct pci_dev *endpoint)
>  {
> -	u32 latency, l1_switch_latency = 0;
> +	u32 latency, lnkcap_up, lnkcap_dw, l1_switch_latency = 0;
> +	struct aspm_latency latency_up, latency_dw;
>  	struct aspm_latency *acceptable;
>  	struct pcie_link_state *link;
>  
> @@ -405,14 +403,23 @@ static void pcie_aspm_check_latency(struct pci_dev *endpoint)
>  	acceptable = &link->acceptable[PCI_FUNC(endpoint->devfn)];
>  
>  	while (link) {
> +		/* Read direction exit latencies */
> +		pcie_capability_read_dword(link->pdev, PCI_EXP_LNKCAP, &lnkcap_up);
> +		pcie_capability_read_dword(pci_function_0(link->pdev->subordinate),

Please avoid the overly long lines.