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[96.230.249.157]) by smtp.gmail.com with ESMTPSA id c11sm3782284qtb.8.2021.11.15.11.01.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 15 Nov 2021 11:01:52 -0800 (PST) Message-ID: <548e59a951a662304a281239a8a964dc9a19b368.camel@redhat.com> Subject: Re: [PATCH] drm/i915/dp: Perform 30ms delay after source OUI write From: Lyude Paul To: Jani Nikula , intel-gfx@lists.freedesktop.org Cc: Ville =?ISO-8859-1?Q?Syrj=E4l=E4?= , stable@vger.kernel.org, Joonas Lahtinen , Rodrigo Vivi , Tvrtko Ursulin , David Airlie , Daniel Vetter , Imre Deak , =?ISO-8859-1?Q?Jos=E9?= Roberto de Souza , Uma Shankar , Anshuman Gupta , Dave Airlie , Gwan-gyeong Mun , Manasi Navare , Ankit Nautiyal , "open list:DRM DRIVERS" , open list Date: Mon, 15 Nov 2021 14:01:51 -0500 In-Reply-To: <878rxp3d1n.fsf@intel.com> References: <20211112215016.270267-1-lyude@redhat.com> <878rxp3d1n.fsf@intel.com> Organization: Red Hat Inc. Content-Type: text/plain; charset="UTF-8" User-Agent: Evolution 3.40.4 (3.40.4-2.fc34) MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, 2021-11-15 at 12:53 +0200, Jani Nikula wrote: > On Fri, 12 Nov 2021, Lyude Paul wrote: > > While working on supporting the Intel HDR backlight interface, I noticed > > that there's a couple of laptops that will very rarely manage to boot up > > without detecting Intel HDR backlight support - even though it's supported > > on the system. One example of such a laptop is the Lenovo P17 1st > > generation. > > > > Following some investigation Ville Syrjälä did through the docs they have > > available to them, they discovered that there's actually supposed to be a > > 30ms wait after writing the source OUI before we begin setting up the rest > > of the backlight interface. > > > > This seems to be correct, as adding this 30ms delay seems to have > > completely fixed the probing issues I was previously seeing. So - let's > > start performing a 30ms wait after writing the OUI, which we do in a > > manner > > similar to how we keep track of PPS delays (e.g. record the timestamp of > > the OUI write, and then wait for however many ms are left since that > > timestamp right before we interact with the backlight) in order to avoid > > waiting any longer then we need to. As well, this also avoids us > > performing > > this delay on systems where we don't end up using the HDR backlight > > interface. > > Ugh. Thanks for digging into this. haha, np! You should thank Ville for finding the hidden docs that told us about this :). > > The only thing that I dislike with the implementation is splitting the > implementation to two places. See how well we've managed to shove all of > the PPS waits inside intel_pps.c. Almost all of intel_dp->pps is managed > within intel_pps.c. gotcha, I think I meant to do this after I got things working but forgot before I sent this out, will respin ASAP > > I think I'd actually add a intel_dp_wait_source_oui() or something in > intel_dp.c, so all of the details about source OUI and > intel_dp->last_oui_write access would be localized. > > > BR, > Jani. > > > > > > Signed-off-by: Lyude Paul > > Fixes: 4a8d79901d5b ("drm/i915/dp: Enable Intel's HDR backlight interface > > (only SDR for now)") > > Cc: Ville Syrjälä > > Cc: # v5.12+ > > --- > >  drivers/gpu/drm/i915/display/intel_display_types.h    |  3 +++ > >  drivers/gpu/drm/i915/display/intel_dp.c               |  3 +++ > >  drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c | 11 +++++++++++ > >  3 files changed, 17 insertions(+) > > > > diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h > > b/drivers/gpu/drm/i915/display/intel_display_types.h > > index ea1e8a6e10b0..b9c967837872 100644 > > --- a/drivers/gpu/drm/i915/display/intel_display_types.h > > +++ b/drivers/gpu/drm/i915/display/intel_display_types.h > > @@ -1653,6 +1653,9 @@ struct intel_dp { > >         struct intel_dp_pcon_frl frl; > >   > >         struct intel_psr psr; > > + > > +       /* When we last wrote the OUI for eDP */ > > +       unsigned long last_oui_write; > >  }; > >   > >  enum lspcon_vendor { > > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c > > b/drivers/gpu/drm/i915/display/intel_dp.c > > index 0a424bf69396..77d9a9390c1e 100644 > > --- a/drivers/gpu/drm/i915/display/intel_dp.c > > +++ b/drivers/gpu/drm/i915/display/intel_dp.c > > @@ -29,6 +29,7 @@ > >  #include > >  #include > >  #include > > +#include > >  #include > >   > >  #include > > @@ -2010,6 +2011,8 @@ intel_edp_init_source_oui(struct intel_dp *intel_dp, > > bool careful) > >   > >         if (drm_dp_dpcd_write(&intel_dp->aux, DP_SOURCE_OUI, oui, > > sizeof(oui)) < 0) > >                 drm_err(&i915->drm, "Failed to write source OUI\n"); > > + > > +       intel_dp->last_oui_write = jiffies; > >  } > >   > >  /* If the device supports it, try to set the power state appropriately */ > > diff --git a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c > > b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c > > index 569d17b4d00f..2c35b999ec2c 100644 > > --- a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c > > +++ b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c > > @@ -96,6 +96,13 @@ > >  #define INTEL_EDP_BRIGHTNESS_OPTIMIZATION_1                            > > 0x359 > >   > >  /* Intel EDP backlight callbacks */ > > +static void > > +wait_for_oui(struct drm_i915_private *i915, struct intel_dp *intel_dp) > > +{ > > +       drm_dbg_kms(&i915->drm, "Performing OUI wait\n"); > > +       wait_remaining_ms_from_jiffies(intel_dp->last_oui_write, 30); > > +} > > + > >  static bool > >  intel_dp_aux_supports_hdr_backlight(struct intel_connector *connector) > >  { > > @@ -106,6 +113,8 @@ intel_dp_aux_supports_hdr_backlight(struct > > intel_connector *connector) > >         int ret; > >         u8 tcon_cap[4]; > >   > > +       wait_for_oui(i915, intel_dp); > > + > >         ret = drm_dp_dpcd_read(aux, INTEL_EDP_HDR_TCON_CAP0, tcon_cap, > > sizeof(tcon_cap)); > >         if (ret != sizeof(tcon_cap)) > >                 return false; > > @@ -204,6 +213,8 @@ intel_dp_aux_hdr_enable_backlight(const struct > > intel_crtc_state *crtc_state, > >         int ret; > >         u8 old_ctrl, ctrl; > >   > > +       wait_for_oui(i915, intel_dp); > > + > >         ret = drm_dp_dpcd_readb(&intel_dp->aux, > > INTEL_EDP_HDR_GETSET_CTRL_PARAMS, &old_ctrl); > >         if (ret != 1) { > >                 drm_err(&i915->drm, "Failed to read current backlight > > control mode: %d\n", ret); > -- Cheers, Lyude Paul (she/her) Software Engineer at Red Hat