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[104.57.184.186]) by smtp.gmail.com with ESMTPSA id o2sm2821311oik.11.2021.11.15.10.34.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 15 Nov 2021 10:34:13 -0800 (PST) Date: Mon, 15 Nov 2021 12:34:08 -0600 From: Bjorn Andersson To: Bhupesh Sharma Cc: linux-arm-msm@vger.kernel.org, linux-crypto@vger.kernel.org, bhupesh.linux@gmail.com, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, robh+dt@kernel.org, agross@kernel.org, herbert@gondor.apana.org.au, davem@davemloft.net, stephan@gerhold.net, Thara Gopinath Subject: Re: [PATCH v5 21/22] arm64/dts: qcom: sm8250: Add dt entries to support crypto engine. Message-ID: References: <20211110105922.217895-1-bhupesh.sharma@linaro.org> <20211110105922.217895-22-bhupesh.sharma@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20211110105922.217895-22-bhupesh.sharma@linaro.org> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed 10 Nov 04:59 CST 2021, Bhupesh Sharma wrote: > Add crypto engine (CE) and CE BAM related nodes and definitions to > "sm8250.dtsi". > > Cc: Thara Gopinath > Cc: Bjorn Andersson > Cc: Rob Herring > Signed-off-by: Bhupesh Sharma > Signed-off-by: Thara Gopinath > --- > arch/arm64/boot/dts/qcom/sm8250.dtsi | 28 ++++++++++++++++++++++++++++ > 1 file changed, 28 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi > index 6f6129b39c9c..691c28066cec 100644 > --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi > +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi > @@ -4104,6 +4104,34 @@ cpufreq_hw: cpufreq@18591000 { > > #freq-domain-cells = <1>; > }; > + > + cryptobam: dma-controller@1dc4000 { > + compatible = "qcom,bam-v1.7.0"; > + reg = <0 0x01dc4000 0 0x24000>; Please keep nodes under /soc sorted by address. Thanks, Bjorn > + interrupts = ; > + #dma-cells = <1>; > + qcom,ee = <0>; > + qcom,controlled-remotely; > + iommus = <&apps_smmu 0x584 0x0011>, > + <&apps_smmu 0x586 0x0011>, > + <&apps_smmu 0x594 0x0011>, > + <&apps_smmu 0x596 0x0011>; > + interconnects = <&aggre2_noc MASTER_CRYPTO_CORE_0 &mc_virt SLAVE_EBI_CH0>; > + interconnect-names = "memory"; > + }; > + > + crypto: crypto@1dfa000 { > + compatible = "qcom,sm8250-qce"; > + reg = <0 0x01dfa000 0 0x6000>; > + dmas = <&cryptobam 4>, <&cryptobam 5>; > + dma-names = "rx", "tx"; > + iommus = <&apps_smmu 0x584 0x0011>, > + <&apps_smmu 0x586 0x0011>, > + <&apps_smmu 0x594 0x0011>, > + <&apps_smmu 0x596 0x0011>; > + interconnects = <&aggre2_noc MASTER_CRYPTO_CORE_0 &mc_virt SLAVE_EBI_CH0>; > + interconnect-names = "memory"; > + }; > }; > > timer { > -- > 2.31.1 >