Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id CCCCAC433FE for ; Tue, 16 Nov 2021 09:09:27 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id BA59A60E78 for ; Tue, 16 Nov 2021 09:09:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232850AbhKPJMU (ORCPT ); Tue, 16 Nov 2021 04:12:20 -0500 Received: from szxga02-in.huawei.com ([45.249.212.188]:15824 "EHLO szxga02-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232764AbhKPJMJ (ORCPT ); Tue, 16 Nov 2021 04:12:09 -0500 Received: from dggemv703-chm.china.huawei.com (unknown [172.30.72.56]) by szxga02-in.huawei.com (SkyGuard) with ESMTP id 4HtgGT36KQz916w; Tue, 16 Nov 2021 17:08:49 +0800 (CST) Received: from dggema772-chm.china.huawei.com (10.1.198.214) by dggemv703-chm.china.huawei.com (10.3.19.46) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256) id 15.1.2308.20; Tue, 16 Nov 2021 17:09:09 +0800 Received: from localhost.localdomain (10.67.165.2) by dggema772-chm.china.huawei.com (10.1.198.214) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2308.20; Tue, 16 Nov 2021 17:09:08 +0800 From: Yicong Yang To: , , , , , , , , , , , , , , , , , , , , CC: , , , , , Subject: [PATCH v2 0/6] Add support for HiSilicon PCIe Tune and Trace device Date: Tue, 16 Nov 2021 17:06:19 +0800 Message-ID: <20211116090625.53702-1-yangyicong@hisilicon.com> X-Mailer: git-send-email 2.31.0 MIME-Version: 1.0 Content-Transfer-Encoding: 7BIT Content-Type: text/plain; charset=US-ASCII X-Originating-IP: [10.67.165.2] X-ClientProxiedBy: dggems701-chm.china.huawei.com (10.3.19.178) To dggema772-chm.china.huawei.com (10.1.198.214) X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org HiSilicon PCIe tune and trace device (PTT) is a PCIe Root Complex integrated Endpoint (RCiEP) device, providing the capability to dynamically monitor and tune the PCIe traffic (tune), and trace the TLP headers (trace). PTT tune is designed for monitoring and adjusting PCIe link parameters. We provide several parameters of the PCIe link. Through the driver, user can adjust the value of certain parameter to affect the PCIe link for the purpose of enhancing the performance in certian situation. PTT trace is designed for dumping the TLP headers to the memory, which can be used to analyze the transactions and usage condition of the PCIe Link. Users can choose filters to trace headers, by either requester ID, or those downstream of a set of Root Ports on the same core of the PTT device. It's also supported to trace the headers of certain type and of certain direction. The driver registers a PMU device for each PTT device. The trace can be used through `perf record` and the traced headers can be decoded by `perf report`. The perf command support for the device is also added in this patchset. The tune can be used through the sysfs attributes of related PMU device. See the documentation for the detailed usage. Change since v1: - switch the user interface of trace to perf from debugfs - switch the user interface of tune to sysfs from debugfs - add perf tool support to start trace and decode the trace data - address the comments of documentation from Bjorn - add RMR[1] support of the device as trace works in RMR mode or direct DMA mode. RMR support is achieved by common APIs rather than the APIs implemented in [1]. Link: https://lore.kernel.org/lkml/1618654631-42454-1-git-send-email-yangyicong@hisilicon.com/ [1] https://lore.kernel.org/linux-acpi/20210805080724.480-1-shameerali.kolothum.thodi@huawei.com/ Qi Liu (1): perf tool: Add support for HiSilicon PCIe Tune and Trace device driver Yicong Yang (5): iommu: Export iommu_{get,put}_resv_regions() hwtracing: Add trace function support for HiSilicon PCIe Tune and Trace device hwtracing: Add tune function support for HiSilicon PCIe Tune and Trace device docs: Add HiSilicon PTT device driver documentation MAINTAINERS: Add maintainer for HiSilicon PTT driver Documentation/trace/hisi-ptt.rst | 305 ++++ MAINTAINERS | 7 + drivers/Makefile | 1 + drivers/hwtracing/Kconfig | 2 + drivers/hwtracing/hisilicon/Kconfig | 8 + drivers/hwtracing/hisilicon/Makefile | 2 + drivers/hwtracing/hisilicon/hisi_ptt.c | 1313 +++++++++++++++++ drivers/iommu/iommu.c | 2 + include/linux/iommu.h | 4 +- tools/perf/arch/arm/util/auxtrace.c | 56 +- tools/perf/arch/arm/util/pmu.c | 3 + tools/perf/arch/arm64/util/Build | 2 +- tools/perf/arch/arm64/util/hisi_ptt.c | 195 +++ tools/perf/util/Build | 2 + tools/perf/util/auxtrace.c | 4 + tools/perf/util/auxtrace.h | 1 + tools/perf/util/hisi-ptt-decoder/Build | 1 + .../hisi-ptt-decoder/hisi-ptt-pkt-decoder.c | 170 +++ .../hisi-ptt-decoder/hisi-ptt-pkt-decoder.h | 28 + tools/perf/util/hisi_ptt.c | 228 +++ tools/perf/util/hisi_ptt.h | 28 + 21 files changed, 2356 insertions(+), 6 deletions(-) create mode 100644 Documentation/trace/hisi-ptt.rst create mode 100644 drivers/hwtracing/hisilicon/Kconfig create mode 100644 drivers/hwtracing/hisilicon/Makefile create mode 100644 drivers/hwtracing/hisilicon/hisi_ptt.c create mode 100644 tools/perf/arch/arm64/util/hisi_ptt.c create mode 100644 tools/perf/util/hisi-ptt-decoder/Build create mode 100644 tools/perf/util/hisi-ptt-decoder/hisi-ptt-pkt-decoder.c create mode 100644 tools/perf/util/hisi-ptt-decoder/hisi-ptt-pkt-decoder.h create mode 100644 tools/perf/util/hisi_ptt.c create mode 100644 tools/perf/util/hisi_ptt.h -- 2.33.0