From:   "Srikandan, Nandhini" <nandhini.srikandan@intel.com>
To:     Serge Semin <fancer.lancer@gmail.com>,
        Mark Brown <broonie@kernel.org>
CC:     Serge Semin <Sergey.Semin@baikalelectronics.ru>,
        "robh+dt@kernel.org" <robh+dt@kernel.org>,
        "linux-spi@vger.kernel.org" <linux-spi@vger.kernel.org>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        "devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
        "mgross@linux.intel.com" <mgross@linux.intel.com>,
        "Pan, Kris" <kris.pan@intel.com>,
        "Demakkanavar, Kenchappa" <kenchappa.demakkanavar@intel.com>,
        "Zhou, Furong" <furong.zhou@intel.com>,
        "Sangannavar, Mallikarjunappa" 
        <mallikarjunappa.sangannavar@intel.com>,
        "Vaidya, Mahesh R" <mahesh.r.vaidya@intel.com>,
        "A, Rashmi" <rashmi.a@intel.com>
Subject: RE: [PATCH v3 1/5] dt-bindings: spi: Add SSTE support for DWC SSI
 controller
Thread-Topic: [PATCH v3 1/5] dt-bindings: spi: Add SSTE support for DWC SSI
 controller
Thread-Index: AQHX1sj9BYV8Rb34sE6mEcfI2eSuS6v+Y/YAgAAIZgCAAAGNgIAJOtqg
Date:   Wed, 17 Nov 2021 12:05:17 +0000
Message-ID: <BN0PR11MB572705BAE8AA3E8CB77CE9C3859A9@BN0PR11MB5727.namprd11.prod.outlook.com>
References: <20211111065201.10249-1-nandhini.srikandan@intel.com>
 <20211111065201.10249-2-nandhini.srikandan@intel.com>
 <20211111143108.pxovseqvm2ywmoc2@mobilestation>
 <YY0wOBoT7X//GfQ8@sirena.org.uk>
 <20211111150645.f6qmnzy6hcoiatun@mobilestation>
In-Reply-To: <20211111150645.f6qmnzy6hcoiatun@mobilestation>
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> -----Original Message-----
> From: Serge Semin <fancer.lancer@gmail.com>
> Sent: Thursday, November 11, 2021 8:37 PM
> To: Mark Brown <broonie@kernel.org>; Srikandan, Nandhini
> <nandhini.srikandan@intel.com>
> Cc: Serge Semin <Sergey.Semin@baikalelectronics.ru>; robh+dt@kernel.org;
> linux-spi@vger.kernel.org; linux-kernel@vger.kernel.org;
> devicetree@vger.kernel.org; mgross@linux.intel.com; Pan, Kris
> <kris.pan@intel.com>; Demakkanavar, Kenchappa
> <kenchappa.demakkanavar@intel.com>; Zhou, Furong
> <furong.zhou@intel.com>; Sangannavar, Mallikarjunappa
> <mallikarjunappa.sangannavar@intel.com>; Vaidya, Mahesh R
> <mahesh.r.vaidya@intel.com>; A, Rashmi <rashmi.a@intel.com>
> Subject: Re: [PATCH v3 1/5] dt-bindings: spi: Add SSTE support for DWC SS=
I
> controller
>=20
> On Thu, Nov 11, 2021 at 03:01:12PM +0000, Mark Brown wrote:
> > On Thu, Nov 11, 2021 at 05:31:08PM +0300, Serge Semin wrote:
> >
> > > BTW Mark, why not to have a generic DT-property which would set that
> > > flag automatically by the SPI-core subsystem seeing it's indeed a
> > > client device-property? For instance there can be some property like
> > > "spi-cs-toggle" DT-property which when specified for the particular
> > > SPI-client DT-node will make the SPI-core subsystem to set the
> >
> > Anything like this is fundamentally part of the wire protocol for the
> > device, there's no need for an extra property on top of the compatible
> > for the device and the driver really, really needs to know what's
> > going on to avoid data corruption.  You could also use this feature
> > together with varying the word size as an optimisation at runtime (eg,
> > do long sequences of register writes in a single hardware operation by
> > setting an appropriate word length to cause the controller to bounce
> > chip select between writes).
> >
> > > SPI_CS_WORD flag of the device mode? Like it has already been done
> > > for "spi-cs-high"/"spi-lsb-first"/etc.
> >
> > I don't think either of those properties was a good idea, there's a
> > bunch of stuff in the older SPI bindings that don't make much sense.
>=20
> Ok. Thanks for clarification. No new DT-property then.
>=20
> Nandhini, could you please drop this patch in v4? One more time I'm sorry
> for misleading you on v2.

Sure, I will make use of SPI_CS_WORD flag and drop this patch in next versi=
on.=20

>=20
> -Sergey