Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9D67CC4332F for ; Wed, 17 Nov 2021 12:49:09 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 826786112D for ; Wed, 17 Nov 2021 12:49:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237289AbhKQMwG (ORCPT ); Wed, 17 Nov 2021 07:52:06 -0500 Received: from mga01.intel.com ([192.55.52.88]:49920 "EHLO mga01.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237290AbhKQMwF (ORCPT ); Wed, 17 Nov 2021 07:52:05 -0500 X-IronPort-AV: E=McAfee;i="6200,9189,10170"; a="257706591" X-IronPort-AV: E=Sophos;i="5.87,241,1631602800"; d="scan'208";a="257706591" Received: from orsmga004.jf.intel.com ([10.7.209.38]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Nov 2021 04:49:06 -0800 X-IronPort-AV: E=Sophos;i="5.87,241,1631602800"; d="scan'208";a="604719627" Received: from smile.fi.intel.com ([10.237.72.184]) by orsmga004-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Nov 2021 04:49:03 -0800 Received: from andy by smile.fi.intel.com with local (Exim 4.95) (envelope-from ) id 1mnKMx-007nDj-7t; Wed, 17 Nov 2021 14:48:55 +0200 Date: Wed, 17 Nov 2021 14:48:54 +0200 From: Andy Shevchenko To: Anand Ashok Dumbre Cc: "linux-kernel@vger.kernel.org" , "jic23@kernel.org" , "lars@metafoo.de" , "linux-iio@vger.kernel.org" , git , Michal Simek , "gregkh@linuxfoundation.org" , "rafael@kernel.org" , "linux-acpi@vger.kernel.org" , "heikki.krogerus@linux.intel.com" , Manish Narani Subject: Re: [PATCH v9 3/5] iio: adc: Add Xilinx AMS driver Message-ID: References: <20211116150842.1051-1-anand.ashok.dumbre@xilinx.com> <20211116150842.1051-4-anand.ashok.dumbre@xilinx.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Nov 16, 2021 at 08:29:21PM +0000, Anand Ashok Dumbre wrote: > > From: Andy Shevchenko > > Sent: Tuesday 16 November 2021 5:39 PM > > On Tue, Nov 16, 2021 at 03:08:40PM +0000, Anand Ashok Dumbre wrote: ... > > > +#define AMS_ALARM_THR_MIN 0x0000 > > > +#define AMS_ALARM_THR_MAX 0xFFFF > > > > If this is limited by hardware register, I would rather use (BIT(16) - 1) > > notation. It will give immediately amount of bits used for the value. > So ~(BIT(16) - 1) for AMS_ALARM_THR_MIN This will give wrong value, so preserving 0 as plain decimal is fine. > (BIT(16) - 1) for AMS_ALARM_THR_MAX ... > > > + u32 reg; > > > + int ret; > > > > u32 expect = AMS_PS_CSTS_PS_READY; > > > > (Use similar approach for other readX_poll_timeout() cases) > > > > > + ret = readl_poll_timeout(ams->base + AMS_PS_CSTS, reg, > > > + (reg & AMS_PS_CSTS_PS_READY) == > > > + AMS_PS_CSTS_PS_READY, 0, > > > + AMS_INIT_TIMEOUT_US); > > > > ret = readl_poll_timeout(ams->base + AMS_PS_CSTS, reg, > > (reg & expect) == expect, > > 0, AMS_INIT_TIMEOUT_US); > > 0?! Any comments on this? Besides there are other cases you haven't answered on, so I assume you agreed to change as suggested. > > > + if (ret) > > > + return ret; > > > > ... > > > > > + ret = readl(ams->base + AMS_PL_CSTS); > > > + if (ret == 0) > > > + return ret; > > > > Assigning u32 to int seems wrong. > > It's a single bit register. > Even if I use u32 here, the return type is int. The problem here is that you checked not for error code, readl() doesn't return an error. So semantic issue. > So, is it ok if I read using u32 and return it by typecasting to int? No. You need to have something like this: value = readl(...); if (value == 0) return 0; this will keep proper meaning of each number and variable, while compiler may optimize it. ... > > > + regval = readl(ams->pl_base + > > > + AMS_REG_CONFIG4); > > > > One line? > > > > > + regval = readl(ams->pl_base + > > > + AMS_REG_CONFIG4); > > > > Ditto and so on... > > > It goes over 80 chars per line. Is it a problem? ... > > > + schedule_delayed_work(&ams->ams_unmask_work, > > > + msecs_to_jiffies(AMS_UNMASK_TIMEOUT_MS)); > > > > Can be one line. > > Over 80 characters. Is it a problem? > Oh! I just saw that upto 100 chars is ok. -- With Best Regards, Andy Shevchenko