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References: <20211117140222.43692-1-robert.marko@sartura.hr>
In-Reply-To: <20211117140222.43692-1-robert.marko@sartura.hr>
Reply-To: wens@csie.org
From:   Chen-Yu Tsai <wens@csie.org>
Date:   Wed, 17 Nov 2021 22:25:36 +0800
Message-ID: <CAGb2v677JvkwZnp+3ST0UNsOWLnzT2QfmYAq22t7T03AVuOSzQ@mail.gmail.com>
Subject: Re: [PATCH v2] arm64: dts: allwinner: orangepi-zero-plus: fix PHY mode
To:     Robert Marko <robert.marko@sartura.hr>
Cc:     Rob Herring <robh+dt@kernel.org>,
        Maxime Ripard <mripard@kernel.org>,
        Jernej Skrabec <jernej.skrabec@gmail.com>,
        Hauke Mehrtens <hauke@hauke-m.de>,
        devicetree <devicetree@vger.kernel.org>,
        linux-arm-kernel <linux-arm-kernel@lists.infradead.org>,
        linux-sunxi@lists.linux.dev,
        linux-kernel <linux-kernel@vger.kernel.org>,
        Ron Goossens <rgoossens@gmail.com>,
        Samuel Holland <samuel@sholland.org>
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On Wed, Nov 17, 2021 at 10:02 PM Robert Marko <robert.marko@sartura.hr> wrote:
>
> Orange Pi Zero Plus uses a Realtek RTL8211E RGMII Gigabit PHY, but its
> currently set to plain RGMII mode meaning that it doesn't introduce
> delays.
>
> With this setup, TX packets are completely lost and changing the mode to
> RGMII-ID so the PHY will add delays internally fixes the issue.
>
> Fixes: a7affb13b271 ("arm64: allwinner: H5: Add Xunlong Orange Pi Zero Plus")
>
> Tested-by: Ron Goossens <rgoossens@gmail.com>
> Signed-off-by: Robert Marko <robert.marko@sartura.hr>
> Tested-by: Samuel Holland <samuel@sholland.org>

Acked-by: Chen-Yu Tsai <wens@csie.org>