From:   Hongxing Zhu <hongxing.zhu@nxp.com>
To:     "tharvey@gateworks.com" <tharvey@gateworks.com>
CC:     Lucas Stach <l.stach@pengutronix.de>,
        Marcel Ziswiler <marcel.ziswiler@toradex.com>,
        Kishon Vijay Abraham I <kishon@ti.com>,
        "vkoul@kernel.org" <vkoul@kernel.org>,
        Rob Herring <robh@kernel.org>,
        "galak@kernel.crashing.org" <galak@kernel.crashing.org>,
        Shawn Guo <shawnguo@kernel.org>,
        "linux-phy@lists.infradead.org" <linux-phy@lists.infradead.org>,
        Device Tree Mailing List <devicetree@vger.kernel.org>,
        Linux ARM Mailing List <linux-arm-kernel@lists.infradead.org>,
        open list <linux-kernel@vger.kernel.org>,
        Sascha Hauer <kernel@pengutronix.de>,
        dl-linux-imx <linux-imx@nxp.com>
Subject: RE: [PATCH v5 0/8] Add the imx8m pcie phy driver and imx8mm pcie
 support
Thread-Topic: [PATCH v5 0/8] Add the imx8m pcie phy driver and imx8mm pcie
 support
Thread-Index: AQHX2nQKnAA55lO24Eigwg7jrckmc6wFXtVggAGcAoCAAQrmgIAAejNA
Date:   Thu, 18 Nov 2021 01:23:23 +0000
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> -----Original Message-----
> From: Tim Harvey <tharvey@gateworks.com>
> Sent: Thursday, November 18, 2021 2:03 AM
> To: Hongxing Zhu <hongxing.zhu@nxp.com>
> Cc: Lucas Stach <l.stach@pengutronix.de>; Marcel Ziswiler
> <marcel.ziswiler@toradex.com>; Kishon Vijay Abraham I
> <kishon@ti.com>; vkoul@kernel.org; Rob Herring <robh@kernel.org>;
> galak@kernel.crashing.org; Shawn Guo <shawnguo@kernel.org>;
> linux-phy@lists.infradead.org; Device Tree Mailing List
> <devicetree@vger.kernel.org>; Linux ARM Mailing List
> <linux-arm-kernel@lists.infradead.org>; open list
> <linux-kernel@vger.kernel.org>; Sascha Hauer <kernel@pengutronix.de>;
> dl-linux-imx <linux-imx@nxp.com>
> Subject: Re: [PATCH v5 0/8] Add the imx8m pcie phy driver and imx8mm
> pcie support
>=20
> On Tue, Nov 16, 2021 at 7:38 PM Hongxing Zhu <hongxing.zhu@nxp.com>
> wrote:
> >
> > <snipped...>
> > > > Subject: Re: [PATCH v5 0/8] Add the imx8m pcie phy driver and
> > > > imx8mm pcie support
> > > >
> > > > On Mon, Nov 1, 2021 at 7:58 PM Richard Zhu
> <hongxing.zhu@nxp.com>
> > > > wrote:
> > > > >
> > > > > Refer to the discussion [1] when try to enable i.MX8MM PCIe
> > > > > support, one standalone PCIe PHY driver should be seperated from
> > > > > i.MX PCIe driver when enable i.MX8MM PCIe support.
> > > > >
> > > > > This patch-set adds the standalone PCIe PHY driver suport[1-5],
> > > > > and i.MX8MM PCIe support[6-8] to have whole view to review
> this
> > > > patch-set.
> > > > >
> > > > > The PCIe works on i.MX8MM EVK board based the the blkctrl
> power
> > > > driver
> > > > > [2] and this patch-set. And tested by Tim and Marcel on the
> > > > > different reference clock modes boards.
> > > > >
> > > > > [1]
> > > > >
> > > >
> > >
> https://eur01.safelinks.protection.outlook.com/?url=3Dhttps%3A%2F%2Fpa
> > > > tc
> > > > >
> > > >
> > >
> hwork.ozlabs.org%2Fproject%2Flinux-pci%2Fpatch%2F20210510141509.
> > > > 929120
> > > > >
> > > >
> > >
> -3-l.stach%40pengutronix.de%2F&amp;data=3D04%7C01%7Chongxing.zhu
> > > > %40nxp.c
> > > > >
> > > >
> > >
> om%7C489971db9c0f4308600208d9a88b2b05%7C686ea1d3bc2b4c6fa9
> > > > 2cd99c5c3016
> > > > >
> > > >
> > >
> 35%7C0%7C0%7C637726137953234928%7CUnknown%7CTWFpbGZsb3d
> > > > 8eyJWIjoiMC4wLj
> > > > >
> > > >
> > >
> AwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000&
> > > > amp;sdata=3D
> > > > >
> > > >
> > >
> ltuNZqIAsEH6%2B1KE4cqNOiUul3Ex%2BWmYcyqD%2BFJuUrs%3D&amp;
> > > > reserved=3D0
> > > > > [2]
> > > > >
> > > >
> > >
> https://eur01.safelinks.protection.outlook.com/?url=3Dhttps%3A%2F%2Fpa
> > > > tc
> > > > >
> > > >
> > >
> hwork.kernel.org%2Fproject%2Flinux-arm-kernel%2Fcover%2F20210910
> > > > 202640
> > > > > .980366-1-l.stach%40pengutronix.de%2F&amp;data=3D04%7C01%7
> Ch
> > > on
> > > > gxing.zhu%
> > > > >
> > > >
> > >
> 40nxp.com%7C489971db9c0f4308600208d9a88b2b05%7C686ea1d3bc2
> > > > b4c6fa92cd99
> > > > >
> > > >
> > >
> c5c301635%7C0%7C0%7C637726137953234928%7CUnknown%7CTWFp
> > > > bGZsb3d8eyJWIjo
> > > > >
> > > >
> > >
> iMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%
> > > > 7C3000&amp
> > > > > ;sdata=3DMrT3Re3YttE9AoqmGHksTqt4jF4vitRPz5lkgpZqSZ4%3D&a
> mp;r
> > > es
> > > > erved=3D0
> > > > >
> > > > > Main changes v4 --> v5:
> > > > > - Set the AUX_EN always 1b'1, thus it can fix the regression
> > > > > introduced
> > > > in v4
> > > > >   series on Marcel's board.
> > > > > - Use the lower-case letter in the devicetreee refer to Marcel's
> > > > comments.
> > > > > - Since the default value of the deemphasis parameters are zero,
> > > > > only
> > > > set
> > > > >   the deemphasis registers when the input paramters are none
> zero.
> > > > >
> > > > > Main changes v3 --> v4:
> > > > > - Update the yaml to fix syntax error, add maxitems and drop
> > > > > description of phy
> > > > > - Correct the clock name in PHY DT node.
> > > > > - Squash the EVK board relalted dts changes into one patch, and
> > > > > drop
> > > > the
> > > > >   useless dummy clock and gpio suffix in DT nodes.
> > > > > - Add board specific de-emphasis parameters as DT properties.
> > > > > Thus
> > > > each board
> > > > >   can specify its actual de-emphasis values.
> > > > > - Update the commit log of PHY driver.
> > > > > - Remove the useless codes from PCIe driver, since they are
> > > > > moved to PHY driver
> > > > > - After the discussion and verification of the CLKREQ#
> > > > > configurations
> > > > with Tim,
> > > > >   agree to add an optional boolean property
> > > > > "fsl,clkreq-unsupported",
> > > > indicates
> > > > >   the CLKREQ# signal is hooked or not in HW designs.
> > > > > - Add "Tested-by: Marcel Ziswiler
> <marcel.ziswiler@toradex.com>"
> > > > > tag,
> > > > since
> > > > >   Marcel help to test the v3 patch-set.
> > > > >
> > > > > Main changes v2 --> v3:
> > > > > - Regarding Lucas' comments.
> > > > >  - to have a whole view to review the patches, send out the
> > > i.MX8MM
> > > > PCIe support too.
> > > > >  - move the PHY related bits manipulations of the GPR/SRC to
> > > > standalone PHY driver.
> > > > >  - split the dts changes to SOC and board DT, and use the enum
> > > > > instead
> > > > of raw value.
> > > > >  - update the license of the dt-binding header file.
> > > > >
> > > > > Changes v1 --> v2:
> > > > > - Update the license of the dt-binding header file to make the
> license
> > > > >   compatible with dts files.
> > > > > - Fix the dt_binding_check errors.
> > > > >
> > > > > Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml    |
> > > 6
> > > > +++
> > > > > Documentation/devicetree/bindings/phy/fsl,imx8-pcie-phy.yaml |
> > > 95
> > > > ++++++++++++++++++++++++++++++++
> > > > > arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi
> > > |
> > > > 55 +++++++++++++++++++
> > > > > arch/arm64/boot/dts/freescale/imx8mm.dtsi
> > > |
> > > > 46 +++++++++++++++-
> > > > > drivers/pci/controller/dwc/pci-imx6.c
> |
> > > > 73 ++++++++++++++++++++++---
> > > > > drivers/phy/freescale/Kconfig
> > > |
> > > > 9 ++++
> > > > > drivers/phy/freescale/Makefile
> > > |
> > > > 1 +
> > > > > drivers/phy/freescale/phy-fsl-imx8m-pcie.c
> |
> > > > 237
> > > >
> > >
> +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
> > > > +++++++++++++++++++++
> > > > > include/dt-bindings/phy/phy-imx8-pcie.h
> |
> > > > 14 +++++
> > > > > 9 files changed, 528 insertions(+), 8 deletions(-)
> > > > >
> > > > > [PATCH v5 1/8] dt-bindings: phy: phy-imx8-pcie: Add binding for
> > > > > the [PATCH v5 2/8] dt-bindings: phy: Add imx8 pcie phy driver
> > > > > support [PATCH v5 3/8] dt-bindings: imx6q-pcie: Add PHY phandles
> > > > > and name [PATCH v5 4/8] arm64: dts: imx8mm: Add the pcie phy
> > > > > support
> > > [PATCH
> > > > v5
> > > > > 5/8] phy: freescale: pcie: Initialize the imx8 pcie [PATCH v5
> > > > > 6/8]
> > > > > arm64: dts: imx8mm: Add the pcie support [PATCH v5 7/8] arm64:
> > > dts:
> > > > > imx8mm-evk: Add the pcie support on imx8mm [PATCH v5 8/8]
> PCI:
> > > > imx:
> > > > > Add the imx8mm pcie support
> > > >
> > > > Richard,
> > > >
> > > > Are you posting a v6 of this series or have we already missed the
> > > > window for 5.16?
> > > [Richard Zhu] Hi Tim:
> > > Thanks for your kindly reminder.
> > > In my original plan, I prefer to merge the codes refine firstly,
> > > then issue the v6 patch-set after the rebase.
> > >
> https://eur01.safelinks.protection.outlook.com/?url=3Dhttps%3A%2F%2Fpa
> > >
> tchwork.kernel.org%2Fproject%2Flinux-arm-kernel%2Fcover%2F1635747
> 47&
> > >
> amp;data=3D04%7C01%7Chongxing.zhu%40nxp.com%7Cb61cadb6304c4fc
> 5b2b308d9
> > >
> a9f47d58%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C1%7C6377
> 2768981662
> > >
> 4369%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoi
> V2luMzIiLCJ
> > >
> BTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000&amp;sdata=3Dl2aYIxQgqabNiB
> ZcPTpszCG
> > > ikSErSr2Wm41bbhr6nBU%3D&amp;reserved=3D0
> > > 8-25562-1-git-send-email-hongxing.zhu@nxp.com/
> > > Unfortunately, I don't get ack from Lucas for other four patches.
> > > Anyway, I would post the v6 patch-set immediately after merge Rob's
> > > comments.
> > >
> > > Best Regards
> > > Richard Zhu
> > > >
> > > > Best regards,
> > > >
> > [Richard Zhu] Hi Tim:
> > The V6 patch-set listed below had been issued.
> > "
> https://eur01.safelinks.protection.outlook.com/?url=3Dhttps%3A%2F%2Fpa
> tchwork.kernel.org%2Fproject%2Flinux-phy%2Fcover%2F1637028976-92
> 01-1-git-send-email-hongxing.zhu%40nxp.com%2F&amp;data=3D04%7C01
> %7Chongxing.zhu%40nxp.com%7Cb61cadb6304c4fc5b2b308d9a9f47d58
> %7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C1%7C63772768981
> 6624369%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQ
> IjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000&amp;sdata=3D9
> 9%2FYacu3kbEIgQoRihQKTPx6bZ5P9EIL2c7YIoARoK0%3D&amp;reserved
> =3D0"
> > GENERIC PHY FRAMEWORK maintainer Kishon and Vinod had been
> contained
> > in the  mail-loop.
> > Do you know who I can ping to pick up the PHY part of this patch-set?
> >
>=20
> Richard,
>=20
> Thanks for posting the v6 series. Hopefully you can get Rob's ACK on the
> last dt-binding patch. I'm not sure who would pick up patches in
> drivers/phy - I don't see a maintainer for that dir. Perhaps Lucas knows?
>=20
> I noticed you did not send your v5 or v6 patchset to
> linux-pci@vger.kernel.org so its missing from
> https://eur01.safelinks.protection.outlook.com/?url=3Dhttps%3A%2F%2Fpa
> tchwork.kernel.org%2Fproject%2Flinux-pci%2Flist%2F&amp;data=3D04%7C
> 01%7Chongxing.zhu%40nxp.com%7Cb61cadb6304c4fc5b2b308d9a9f47d
> 58%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C1%7C637727689
> 816634320%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLC
> JQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000&amp;sdata
> =3DOXqC48KlbI%2FW2YegPy5ERLWD3nPU4Jbw03AaizH%2B6P8%3D&amp;
> reserved=3D0 and maybe that's why you haven't gotten ack's yet?
>=20
[Richard Zhu] Ooh... It's my fault.
When Lucas want to have a whole view with the PHY part driver
 and PCIe controller driver changes.
I forget include the Linux-pci@vger.kernel.org into the mail loop.
I'll resend the v6 patch after include the Linux-pci@vger.kernel.org.
Thanks for your reminder.

Best Regards
Richard Zhu

> Best regards,
>=20
> Tim
>=20
>=20
> Tim