Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5FBA5C4332F for ; Thu, 18 Nov 2021 20:00:09 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 475D261AA3 for ; Thu, 18 Nov 2021 20:00:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233540AbhKRUDI (ORCPT ); Thu, 18 Nov 2021 15:03:08 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35966 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230405AbhKRUDH (ORCPT ); Thu, 18 Nov 2021 15:03:07 -0500 Received: from mail-ua1-x930.google.com (mail-ua1-x930.google.com [IPv6:2607:f8b0:4864:20::930]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 75C90C06174A for ; Thu, 18 Nov 2021 12:00:06 -0800 (PST) Received: by mail-ua1-x930.google.com with SMTP id az37so16266863uab.13 for ; Thu, 18 Nov 2021 12:00:06 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=wTLcbVWrF0jAguOtxvSE2fxFOAqrINCwUvyhsM88wiQ=; b=xJgHu5nGTzGq1z1uegZo1b2kDPztDnyOE5CWKBHnexjO9MeJcUxWEDUJJx7CIac2Pe x+KzoJXjbNLxH3hcGhU2zf1Bl0YtV/8jA6E2t9CAlwrTzzY8yFwecOv4S6ZXR+Fal7YA lQAh3fsQYn9HnhtV85TItabze0KI+BsEzle+LYN8E+99kDn4RkGhvAleItu0rCPTfNxf bH8bWKG+/lNG6k1sy6KQF5hozB6lwHn8NefylmcRTFIXxlbyR3QeoKZHxVCr5aFo4glE 1DOnDPC7M1kQyRq6SIwQCstwEyoHhESaBXI2Gecy7UDXsRisZGGDfgWDPVbaQMU4X6US HY/w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=wTLcbVWrF0jAguOtxvSE2fxFOAqrINCwUvyhsM88wiQ=; b=tWawDBbYggBqEv3dtkAV1wY4CWtn5BpRdnepJsUi5q04vJd64KsZ9W6ziZ81aQ78YU 7IWh99qF561xKmg1/E5dD9MGlADzxdSGPV2yvMoON01UCPWIleeFINk7FO/g7MMj8T7g +dy9tZe6mszc8yLI3oQ8evx4Ez2wOwb3Yaib5N2nci/uDGMcQXWjctykXq9JkjHvqWUt KZjvl3F+oXIwEm6+oJilneLDTT/07UQOVHrhDEHTZFwgEqTXQZfTam5Mz5WBLxza8FHn +Xgcqw2paecKnJMECp++Xm6saAcje7jME5FSYxwH0S8GSG4m2fPloarKvW3mKRxlQAIe cKPg== X-Gm-Message-State: AOAM533UiT9fEVwJXYY/x1y97Q8CY0cNEVccAU71hIOkW8Ulw12uNDPm 4R8AKSatuCmMwA4AgfDCvHnY/qd/t5thsnjzmZOdSg== X-Google-Smtp-Source: ABdhPJwbE3pupBTAOUQbpkhtvy7vjY7xqzTjlwsvOO4K+rUdArjo9f0XPpSAvOoBNURq4nPOFYSglotNhcYITP9UmEo= X-Received: by 2002:a05:6102:ac3:: with SMTP id m3mr69022069vsh.1.1637265605012; Thu, 18 Nov 2021 12:00:05 -0800 (PST) MIME-Version: 1.0 References: <20211112010137.149174-1-jaewon02.kim@samsung.com> <20211112010137.149174-3-jaewon02.kim@samsung.com> <001401d7da86$f7ebd660$e7c38320$@samsung.com> In-Reply-To: From: Sam Protsenko Date: Thu, 18 Nov 2021 21:59:53 +0200 Message-ID: Subject: Re: [PATCH v3 2/2] i2c: exynos5: add support for ExynosAutov9 SoC To: Krzysztof Kozlowski Cc: Chanho Park , Jaewon Kim , Wolfram Sang , Rob Herring , linux-samsung-soc@vger.kernel.org, linux-i2c@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, 16 Nov 2021 at 11:32, Krzysztof Kozlowski wrote: > > On 16/11/2021 02:12, Chanho Park wrote: > >> With this patch the Exynos850 HSI2C becomes functional. The only nit-pick > >> from my side (just a food for thought): do we want to configure USI > >> related config inside of particular drivers (SPI, I2C, UART)? Or it would > >> be better design to implement some platform driver for that, so we can > >> choose USI configuration (SPI/I2C/UART) in device tree? I think this > >> series is good to be merged as is, but we should probably consider all > >> upsides and downsides of each option, for the future work. > > > > I'm also considering how to support this USI configuration gracefully. > > Current version of USI is v2 which means there is a v1 version as well. It might be a non-upstream SoC so we don't need to consider it so far. > > But, there is a possibility that the USI hw version can be bumped for future SoCs. > > > > As you probably know, earlier version of the product kernel has a USI SoC driver[1] and it was designed to be configured the USI settings by device tree. > > > > Option1) Make a USI driver under soc/samsung/ like [1]. > > Option2) Use more generic driver such as "reset driver"? This might be required to extend the reset core driver. > > Option3) Each USI driver(uart/i2c/spi) has its own USI configurations respectively and expose some configurations which can be variable as device tree. > > > > [1]: https://github.com/ianmacd/d2s/blob/master/drivers/soc/samsung/usi_v2.c > > I don't have user manuals, so all my knowledge here is based on > Exynos9825 vendor source code, therefore it is quite limited. In > devicetree the USI devices have their own nodes - but does it mean it's > separate SFR range dedicated to USI? Looks like that, especially that > address space is just for one register (4 bytes). > > In such case having separate dedicated driver makes sense and you would > only have to care about driver ordering (e.g. via device links or phandles). > > Option 2 looks interesting - reusing reset framework to set proper USI > mode, however this looks more like a hack. As you said Chanho, if there > is a USI version 3, this reset framework might not be sufficient. > > In option 3 each driver (UART/I2C/SPI) would need to receive second IO > range and toggle some registers, which could be done via shared > function. If USI v3 is coming, all such drivers could get more complicated. > > I think option 1 is the cleanest and extendable in future. It's easy to > add usi-v3 or whatever without modifying the UART/I2C/SPI drivers. It > also nicely encapsulates USI-related stuff in separate driver. Probe > ordering should not be a problem now. > > But as I said, I don't have even the big picture here, so I rely on your > opinions more. > Hi Krzysztof, Can you please let me know if you're going to apply this series as is, or if you want me to submit USIv2 driver first, and then rework this patch on top of it? I'm working on some HSI2C related patches right now, and thus it'd nice to know about your decision on this series beforehand, as some of my patches (like bindings doc patches) might depend on it. Basically I'd like to base my patches on the proper baseline, so we don't have to rebase those later. Thanks! > Best regards, > Krzysztof