Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A56D8C433EF for ; Mon, 22 Nov 2021 12:36:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239568AbhKVMjO (ORCPT ); Mon, 22 Nov 2021 07:39:14 -0500 Received: from mailgw02.mediatek.com ([210.61.82.184]:55098 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S236731AbhKVMjK (ORCPT ); Mon, 22 Nov 2021 07:39:10 -0500 X-UUID: fc37ff414fb34442ab8ee3f603c0371b-20211122 X-UUID: fc37ff414fb34442ab8ee3f603c0371b-20211122 Received: from mtkexhb01.mediatek.inc [(172.21.101.102)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 2113811232; Mon, 22 Nov 2021 20:35:59 +0800 Received: from mtkcas11.mediatek.inc (172.21.101.40) by mtkmbs07n1.mediatek.inc (172.21.101.16) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 22 Nov 2021 20:35:58 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas11.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Mon, 22 Nov 2021 20:35:58 +0800 From: Sam Shih To: Matthias Brugger , Rob Herring , , , , CC: John Crispin , Ryder Lee , Sam Shih Subject: [PATCH v10 1/2] arm64: dts: mediatek: add pinctrl support for mt7986a Date: Mon, 22 Nov 2021 20:35:51 +0800 Message-ID: <20211122123552.8218-2-sam.shih@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20211122123552.8218-1-sam.shih@mediatek.com> References: <20211122123552.8218-1-sam.shih@mediatek.com> MIME-Version: 1.0 Content-Type: text/plain X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add mt7986a pinctrl node, and update pinmux setting for mt7986a Signed-off-by: Sam Shih --- arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts | 20 +++++++++++++++++++ arch/arm64/boot/dts/mediatek/mt7986a.dtsi | 21 ++++++++++++++++++++ 2 files changed, 41 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts b/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts index 6911862390d7..5cd760abff51 100644 --- a/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts +++ b/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts @@ -29,9 +29,29 @@ &uart0 { }; &uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&uart1_pins>; status = "okay"; }; &uart2 { + pinctrl-names = "default"; + pinctrl-0 = <&uart2_pins>; status = "okay"; }; + +&pio { + uart1_pins: uart1-pins { + mux { + function = "uart"; + groups = "uart1"; + }; + }; + + uart2_pins: uart2-pins { + mux { + function = "uart"; + groups = "uart2"; + }; + }; +}; diff --git a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi index 77906839cc85..b8da76b6ba47 100644 --- a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi @@ -107,6 +107,27 @@ watchdog: watchdog@1001c000 { status = "disabled"; }; + pio: pinctrl@1001f000 { + compatible = "mediatek,mt7986a-pinctrl"; + reg = <0 0x1001f000 0 0x1000>, + <0 0x11c30000 0 0x1000>, + <0 0x11c40000 0 0x1000>, + <0 0x11e20000 0 0x1000>, + <0 0x11e30000 0 0x1000>, + <0 0x11f00000 0 0x1000>, + <0 0x11f10000 0 0x1000>, + <0 0x1000b000 0 0x1000>; + reg-names = "gpio", "iocfg_rt", "iocfg_rb", "iocfg_lt", + "iocfg_lb", "iocfg_tr", "iocfg_tl", "eint"; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pio 0 0 100>; + interrupt-controller; + interrupts = ; + interrupt-parent = <&gic>; + #interrupt-cells = <2>; + }; + trng: trng@1020f000 { compatible = "mediatek,mt7986-rng", "mediatek,mt7623-rng"; -- 2.29.2