Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 50710C433F5 for ; Tue, 23 Nov 2021 08:48:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235096AbhKWIwF (ORCPT ); Tue, 23 Nov 2021 03:52:05 -0500 Received: from mail.kernel.org ([198.145.29.99]:52092 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232775AbhKWIwB (ORCPT ); Tue, 23 Nov 2021 03:52:01 -0500 Received: from disco-boy.misterjones.org (disco-boy.misterjones.org [51.254.78.96]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id C3A0960E73; Tue, 23 Nov 2021 08:48:52 +0000 (UTC) Received: from sofa.misterjones.org ([185.219.108.64] helo=why.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1mpRTu-007ERv-JB; Tue, 23 Nov 2021 08:48:50 +0000 Date: Tue, 23 Nov 2021 08:48:50 +0000 Message-ID: <87sfvncl59.wl-maz@kernel.org> From: Marc Zyngier To: Luca Ceresoli Cc: Pali =?UTF-8?B?Um9ow6Fy?= , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-pci@vger.kernel.org, kernel-team@android.com, Alyssa Rosenzweig , Lorenzo Pieralisi , Bjorn Helgaas Subject: Re: [PATCH v2] PCI: apple: Follow the PCIe specifications when resetting the port In-Reply-To: <4fd0438e-b86b-2e1a-ea9a-2297d3580836@lucaceresoli.net> References: <20211122104156.518063-1-maz@kernel.org> <20211122120347.6qyiycqqjkgqvtta@pali> <87zgpw5jza.wl-maz@kernel.org> <4fd0438e-b86b-2e1a-ea9a-2297d3580836@lucaceresoli.net> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/27.1 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: luca@lucaceresoli.net, pali@kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-pci@vger.kernel.org, kernel-team@android.com, alyssa@rosenzweig.io, lorenzo.pieralisi@arm.com, bhelgaas@google.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Luca, On Mon, 22 Nov 2021 21:32:15 +0000, Luca Ceresoli wrote: > > >> Just one comment. PERST# (PCIe Reset) is active-low signal. De-asserting > >> means to really set value to 1. > >> > >> But there was a discussion that de-asserting should be done by call: > >> gpiod_set_value(reset, 0); > >> > >> https://lore.kernel.org/linux-pci/51be082a-ff10-8a19-5648-f279aabcac51@lucaceresoli.net/ > >> > >> Could we make this new pcie-apple.c driver to use gpiod_set_value(reset, 0) > >> for de-asserting, like in other drivers? > > I agree it should be done right from the beginning since this is a new > driver. Fixing it later is a painful process. No more painful than anything else. At this stage, using a positive or negative polarity is immaterial, as there is no core infrastructure making any use of this behaviour (every single driver must reinvent its own square wheel). If such an infrastructure existed, that'd indeed be a requirement. For now, this is merely a convention. > > I guess it depends whether you care about the assertion or the signal > > itself. I think we may have a bug in the way the GPIOs are handled at > > the moment, as it makes no difference whether I register the GPIO are > > active high or active low... > > > > I guess that will be yet another thing to debug, but in the meantime > > we have a reliable reset. > > Strange, in my case the "active low" pin polarity is correctly picked up > from device tree by the gpiolib code, thus using gpio_set_value(gpiod, > 1) asserts the pin as it should, resulting in an electrically low pin. As I said, this looks like a bug, probably in the M1 DT. I'll try to look into it when I get the time. M. -- Without deviation from the norm, progress is not possible.