Date:   Fri, 26 Nov 2021 15:38:43 +0100
From:   Andrew Lunn <andrew@lunn.ch>
To:     Wells Lu =?utf-8?B?5ZGC6Iqz6aiw?= <wells.lu@sunplus.com>
Cc:     Wells Lu <wellslutw@gmail.com>,
        "davem@davemloft.net" <davem@davemloft.net>,
        "kuba@kernel.org" <kuba@kernel.org>,
        "robh+dt@kernel.org" <robh+dt@kernel.org>,
        "netdev@vger.kernel.org" <netdev@vger.kernel.org>,
        "devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        "p.zabel@pengutronix.de" <p.zabel@pengutronix.de>,
        Vincent Shih =?utf-8?B?5pa96YyV6bS7?= 
        <vincent.shih@sunplus.com>
Subject: Re: [PATCH v2 2/2] net: ethernet: Add driver for Sunplus SP7021
Message-ID: <YaDxc2+HKUYxsmX4@lunn.ch>
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On Fri, Nov 26, 2021 at 03:56:28AM +0000, Wells Lu 呂芳騰 wrote:
> Hi Andrew,
> 
> I set phy-id registers to 30 and 31 and found the read-back
> values of mdio read commands from CPU are all 0x0000.
> 
> I consulted with an ASIC engineer. She confirmed that if
> phy-id of a mdio command from CPU does not match any 
> phy-id registers, the mdio command will not be sent out.
> 
> She explained if phy-id of a mdio command does not match 
> any phy-id registers (represent addresses of external PHYs),
> why MAC needs to send a command to non-existing PHY?

Reads or writes on a real PHY which Linux is driving can have side
effects. There is a link statue register which latches. Read it once,
you get the last status, read it again, you get the current status. If
the MAC hardware is reading this register as well a Linux, bad things
will happen. A read on the interrupt status register often clears the
interrupts. So Linux will not see the interrupts.

So you need to make sure you hardware is not touching a PHY which
Linux uses. Which is why i suggested using MDIO bus address 31, which
generally does not have a PHY at that address.

	  Andrew