From:   Anup Patel <anup.patel@wdc.com>
To:     Paolo Bonzini <pbonzini@redhat.com>, Shuah Khan <shuah@kernel.org>,
        Atish Patra <atishp@atishpatra.org>
Cc:     Palmer Dabbelt <palmer@dabbelt.com>,
        Paul Walmsley <paul.walmsley@sifive.com>,
        Albert Ou <aou@eecs.berkeley.edu>,
        Alistair Francis <Alistair.Francis@wdc.com>,
        Anup Patel <anup@brainfault.org>, kvm@vger.kernel.org,
        kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org,
        linux-kernel@vger.kernel.org, linux-kselftest@vger.kernel.org,
        Anup Patel <anup.patel@wdc.com>
Subject: [PATCH 0/4] KVM RISC-V 64-bit selftests support
Date:   Fri, 26 Nov 2021 21:10:16 +0530
Message-Id: <20211126154020.342924-1-anup.patel@wdc.com>
Content-Transfer-Encoding: 8bit
Content-Type: text/plain
MIME-Version: 1.0
WDCIPOUTBOUND: EOP-TRUE
X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1
X-MS-Exchange-AntiSpam-MessageData-0: =?us-ascii?Q?qvyLlNXO9rbz51jm1oGv9+B+hyxhaFOQgrCwe70P5uOEscBYpNvl9/PmTXBQ?=
 =?us-ascii?Q?TJdmi/fpTfUqaGSaG7WXcizbY2j48IGg9rWaYg1rV13RNyUCQRfXH6AVbSg1?=
 =?us-ascii?Q?1R/q7IalueBcwQcbhbgVpAWrIyUQboa4ksIGE23yTdnUfKR7P6zjrmOxifup?=
 =?us-ascii?Q?7ZD9OScJCM1M1+6YfJi9QwRPewdLSp+ppiGw9oO2ZcM9upGTDOl+SdYV6JYl?=
 =?us-ascii?Q?Bc89dclgeWdLgbGo7nVj4uqLkaHzco8hlosFjIw0aKThqRCEFhjl5Rm3PQKA?=
 =?us-ascii?Q?gavTeb37Gu3Eu0WByBy75AHS9k9f416cAwHxUoE7yQI8ZEkyRjM5VZlApiuT?=
 =?us-ascii?Q?oVTsIwu4WwM353Uui/KggCha49YtyNHXScyNqsQf6UxcZgVBwi7bREKi6vD8?=
 =?us-ascii?Q?QdE+cStXdj1n1N+wDO8aiZSYFjXHzoDlyG3jR4qJY4SwkslzGrzMYytU5MwV?=
 =?us-ascii?Q?sk6Z2lrpgeJ1+7iZpUCjaYm/h0aLkDjkwm/4AOgnLFJlY4QpHW5IVUYRTBYc?=
 =?us-ascii?Q?vU+ajN1WtC+NsB5JedlmWtWMByu4ZPIspcCrJGQf5ggDnv3yum777fUE2iPI?=
 =?us-ascii?Q?b8JnIr2mCUEFbxdFYxqeuSoY7xU+3EUejlPOJb7khkFitlZRUxLR+SnEBqsz?=
 =?us-ascii?Q?GBHNAuUa/oED3evQvu45ZAG/tdxWsjSthz/cHeQzmppbyQUYzJK78Gigaqdb?=
 =?us-ascii?Q?1OPG2RgTXtQvdLquAiJeNzN7NF7YJMXKiVrxTifRGK8z6vEaSHLSy1qsCUsg?=
 =?us-ascii?Q?TMn1GtOFqZyiCdDN/jXGeK+bNmtaOFw8jgbgF3JMn+3oEFO4+rhMcO34eFDc?=
 =?us-ascii?Q?g86RBhuLqGwwGZXfAqt8eUbKokH+GcLdH+ehfZTnYqBo5eowYoAv+f2k+1Bv?=
 =?us-ascii?Q?B5e3+f98Bz+gvMU8VXCafL9NfoIgoUtICPAnHQ6ifdKX6MA77vDdTnfk/4Xj?=
 =?us-ascii?Q?UwhaV74dvHJk32neCMtV1orBDNO7IPm/zoBRGfSk1JpiC00JaMzyR9WQflky?=
 =?us-ascii?Q?/Zq6cX34gEbTnLJLnmUoiQDny/Znx3QPubDHE2AUJQ5q87UYFen08nvmU5pz?=
 =?us-ascii?Q?gajO7544AahN8ZeAWatX7VALxUnbF+aXm8MpAZshHyhRmsZlI3EFemf2HP+p?=
 =?us-ascii?Q?cN/tUPuHSg74SbkJoBAZoglgLYIeC92eB6v4VXHryL5JFJ6luGTdWocxczyI?=
 =?us-ascii?Q?AI8B1cSeD4Ic0dzYP/jLJDqzDsaJiKDEG3jsF9EZPTTPoRKhFR1FgGg2aKU8?=
 =?us-ascii?Q?NZXBeh5UzDAH/KC0gzskMQbnihyI2Dh0TcYf7tfLRNRrvbA/j4yhqkBsd6Z+?=
 =?us-ascii?Q?QOzlzjPDSoOSJxTGJFc+4mWDjEg+RysD84YsCNlPqfnrt3WLyvu2Z9asFbmH?=
 =?us-ascii?Q?31JEK5vkjJM61QlsZsq7idi0ZPI92KebZv0N0rReS4+TgcSTpMDbpRLkPrho?=
 =?us-ascii?Q?Yd18EUNuvkKl0mdMiIshQW1WRqlEzCQtIKyAf3bBkaM17fYJWtqaK4t2R1gi?=
 =?us-ascii?Q?3w7slJZkcam4g2WZi93EqJMlORNst6IZhy64CPY9RJF3s1RNhWZahjE51AJh?=
 =?us-ascii?Q?QAtQa8ZTs35inPpxiLeaYvhQuWayDOKeRG3umTlPlf5mLodKZk2G5v5rI0rq?=
 =?us-ascii?Q?KOfx8xm68IWXKujMsE1NTWQ=3D?=
X-OriginatorOrg: wdc.com
X-MS-Exchange-CrossTenant-Network-Message-Id: 2e226c34-a6b4-45c3-6609-08d9b0f31e0f
X-MS-Exchange-CrossTenant-AuthSource: CO6PR04MB7812.namprd04.prod.outlook.com
X-MS-Exchange-CrossTenant-AuthAs: Internal
X-MS-Exchange-CrossTenant-OriginalArrivalTime: 26 Nov 2021 15:40:48.1565
 (UTC)
X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted
X-MS-Exchange-CrossTenant-Id: b61c8803-16f3-4c35-9b17-6f65f441df86
X-MS-Exchange-CrossTenant-MailboxType: HOSTED
X-MS-Exchange-CrossTenant-UserPrincipalName: a0/2aq8ByaX2FPbEgFcfhVJHR5PhBfApjctEXGILXtbv3PJLTGUjty31+1AE3eJwa7CW/pFRVWiYYTME+BT1fg==
X-MS-Exchange-Transport-CrossTenantHeadersStamped: CO6PR04MB8330
Precedence: bulk
List-ID: <linux-kernel.vger.kernel.org>
X-Mailing-List: linux-kernel@vger.kernel.org

This series adds initial support for testing KVM RISC-V 64-bit using
kernel selftests framework. The PATCH1 & PATCH2 of this series does
some ground work in KVM RISC-V to implement RISC-V support in the KVM
selftests whereas remaining patches does required changes in the KVM
selftests.

These patches can be found in riscv_kvm_selftests_v1 branch at:
https://github.com/avpatel/linux.git

Anup Patel (4):
  RISC-V: KVM: Forward SBI experimental and vendor extensions
  RISC-V: KVM: Add VM capability to allow userspace get GPA size
  KVM: selftests: Add EXTRA_CFLAGS in top-level Makefile
  KVM: selftests: Add initial support for RISC-V 64-bit

 arch/riscv/include/asm/kvm_host.h             |   1 +
 arch/riscv/kvm/mmu.c                          |   5 +
 arch/riscv/kvm/vcpu_sbi.c                     |   4 +
 arch/riscv/kvm/vcpu_sbi_base.c                |  27 ++
 arch/riscv/kvm/vm.c                           |   3 +
 include/uapi/linux/kvm.h                      |   1 +
 tools/testing/selftests/kvm/Makefile          |  14 +-
 .../testing/selftests/kvm/include/kvm_util.h  |  10 +
 .../selftests/kvm/include/riscv/processor.h   | 135 +++++++
 tools/testing/selftests/kvm/lib/guest_modes.c |  10 +
 .../selftests/kvm/lib/riscv/processor.c       | 362 ++++++++++++++++++
 tools/testing/selftests/kvm/lib/riscv/ucall.c |  87 +++++
 12 files changed, 658 insertions(+), 1 deletion(-)
 create mode 100644 tools/testing/selftests/kvm/include/riscv/processor.h
 create mode 100644 tools/testing/selftests/kvm/lib/riscv/processor.c
 create mode 100644 tools/testing/selftests/kvm/lib/riscv/ucall.c

-- 
2.25.1