Date:   Fri, 26 Nov 2021 13:29:37 -0700
From:   Nathan Chancellor <nathan@kernel.org>
To:     Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
Cc:     linuxarm@huawei.com, mauro.chehab@huawei.com,
        Hans Verkuil <hverkuil-cisco@xs4all.nl>,
        Mauro Carvalho Chehab <mchehab@kernel.org>,
        linux-kernel@vger.kernel.org, linux-media@vger.kernel.org
Subject: Re: [PATCH 19/20] media: cobalt: drop an unused variable
Message-ID: <YaFDsZrPOO5gshoi@archlinux-ax161>
References: <cover.1637781097.git.mchehab+huawei@kernel.org>
 <ed14f3d4d03fbeb8d42d1bc6ffcb4d49ee18a8d2.1637781097.git.mchehab+huawei@kernel.org>
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On Wed, Nov 24, 2021 at 08:13:22PM +0100, Mauro Carvalho Chehab wrote:
> The clock_control value is read but never actually used. Based on
> a comment at the code, it has to be reset at the function.
> 
> So, drop the variable that stores its value.
> 
> Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>

Reviewed-by: Nathan Chancellor <nathan@kernel.org>

> ---
> 
> To avoid mailbombing on a large number of people, only mailing lists were C/C on the cover.
> See [PATCH 00/20] at: https://lore.kernel.org/all/cover.1637781097.git.mchehab+huawei@kernel.org/
> 
>  drivers/media/pci/cobalt/cobalt-cpld.c | 5 +----
>  1 file changed, 1 insertion(+), 4 deletions(-)
> 
> diff --git a/drivers/media/pci/cobalt/cobalt-cpld.c b/drivers/media/pci/cobalt/cobalt-cpld.c
> index 3d8026483ac3..fad882459d23 100644
> --- a/drivers/media/pci/cobalt/cobalt-cpld.c
> +++ b/drivers/media/pci/cobalt/cobalt-cpld.c
> @@ -236,7 +236,6 @@ bool cobalt_cpld_set_freq(struct cobalt *cobalt, unsigned f_out)
>  	u8 n1, hsdiv;
>  	u8 regs[6];
>  	int found = 0;
> -	u16 clock_ctrl;
>  	int retries = 3;
>  
>  	for (i = 0; i < ARRAY_SIZE(multipliers); i++) {
> @@ -260,9 +259,7 @@ bool cobalt_cpld_set_freq(struct cobalt *cobalt, unsigned f_out)
>  	hsdiv = multipliers[i_best].hsdiv - 4;
>  	rfreq = div_u64(dco << 28, f_xtal);
>  
> -	clock_ctrl = cpld_read(cobalt, SI570_CLOCK_CTRL);
> -	clock_ctrl |= S01755_REG_CLOCK_CTRL_BITMAP_CLKHSMA_FPGA_CTRL;
> -	clock_ctrl |= S01755_REG_CLOCK_CTRL_BITMAP_CLKHSMA_EN;
> +	cpld_read(cobalt, SI570_CLOCK_CTRL);
>  
>  	regs[0] = (hsdiv << 5) | (n1 >> 2);
>  	regs[1] = ((n1 & 0x3) << 6) | (rfreq >> 32);
> -- 
> 2.33.1
> 
>