Date:   Sun, 28 Nov 2021 19:12:19 -0600
From:   Rob Herring <robh@kernel.org>
To:     Cai Huoqing <caihuoqing@baidu.com>
Cc:     Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
        devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
        linux-staging@lists.linux.dev
Subject: Re: [PATCH v3 2/3] dt-bindings: staging: Add the binding
 documentation for ZHOUYI AI accelerator
Message-ID: <YaQo81xyEkZpqXnc@robh.at.kernel.org>
References: <20211126021904.32325-1-caihuoqing@baidu.com>
 <20211126021904.32325-3-caihuoqing@baidu.com>
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On Fri, Nov 26, 2021 at 10:19:00AM +0800, Cai Huoqing wrote:
> ZHOUYI NPU is an AI accelerator chip which is integrated into ARM SOC,
> such as Allwinner R329 SOC.
> Add the binding documentation for ZHOUYI AI accelerator.
> 
> Signed-off-by: Cai Huoqing <caihuoqing@baidu.com>
> ---
> v2->v3:
>         *Fix unit_address_format, avoid leading 0s.
> 
>  .../bindings/staging/arm,zynpu.yaml           | 61 +++++++++++++++++++
>  1 file changed, 61 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/staging/arm,zynpu.yaml
> 
> diff --git a/Documentation/devicetree/bindings/staging/arm,zynpu.yaml b/Documentation/devicetree/bindings/staging/arm,zynpu.yaml
> new file mode 100644
> index 000000000000..d452c08ab4a3
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/staging/arm,zynpu.yaml
> @@ -0,0 +1,61 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/staging/arm,zynpu.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: ARM ZHOUYI AI accelerator bindings
> +
> +maintainers:
> +  - Cai Huoqing <caihuoqing@baidu.com>
> +
> +description:
> +  Supports ZHOUYI AI accelerator in ARM SOC.
> +
> +properties:
> +  compatible:
> +    const: armchina,zhouyi-v1
> +
> +  reg:
> +    maxItems: 1
> +
> +  device_type:

device_type is deprecated except for a couple of uses.

> +    const: zynpu
> +
> +  cma-reserved-bytes:
> +    default: 0

Use 'memory-region' and your own carve out if you need this, but do you 
really need this in DT? Is this fixed for a given board/platform rather 
than something a user would want to tune?


> +
> +  interrupts:
> +    maxItems: 1
> +
> +  clocks:
> +    maxItems: 3

You must define what each clock is and the order.

> +
> +required:
> +  - compatible
> +  - reg
> +  - device_type
> +  - cma-reserved-bytes
> +  - interrupts
> +  - clocks
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    #include <dt-bindings/interrupt-controller/arm-gic.h>
> +    soc {
> +        #address-cells = <2>;
> +        #size-cells = <2>;
> +        zynpu@3050000 {
> +            compatible = "armchina,zhouyi-v1";
> +            reg = <0x0 0x3050000 0x0 0x1000>;
> +            device_type = "zynpu";
> +            cma-reserved-bytes = <0x2600000>;
> +            interrupts = <GIC_SPI 64 IRQ_TYPE_EDGE_RISING>;
> +            clocks = <&clk_zynpu>,
> +                     <&clk_pll_zynpu>,
> +                     <&clk_zynpu_slv>;
> +        };
> +    };
> +...
> -- 
> 2.25.1
> 
>