Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D6281C433EF for ; Mon, 29 Nov 2021 16:45:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1347323AbhK2QsY (ORCPT ); Mon, 29 Nov 2021 11:48:24 -0500 Received: from smtp-out2.suse.de ([195.135.220.29]:53608 "EHLO smtp-out2.suse.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232009AbhK2QqS (ORCPT ); Mon, 29 Nov 2021 11:46:18 -0500 Received: from relay2.suse.de (relay2.suse.de [149.44.160.134]) by smtp-out2.suse.de (Postfix) with ESMTP id D38B61FD38; Mon, 29 Nov 2021 16:42:59 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=suse.de; s=susede2_rsa; t=1638204179; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version:content-type:content-type: in-reply-to:in-reply-to:references:references; bh=QUKCOvl4CJzvTmXhb5oVQ1MaaCyer2L/UBKhuNmXlNw=; b=LYXA0zj1FqXGmG8eK0DdZn6tOPHh4hOfEXHwnUGG+R0d4SAfYGSwcQUhe5PuMJmr8eM2fd LswxuQchBqukhpcJTxW8krelfowk3aWV78EwHiBy6W04UzQQVbCvNJzt563AB4cbEYDihJ EEyOCGjFQDGLhvv8rnDTCpR1SHfPQ5A= DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=suse.de; s=susede2_ed25519; t=1638204179; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version:content-type:content-type: in-reply-to:in-reply-to:references:references; bh=QUKCOvl4CJzvTmXhb5oVQ1MaaCyer2L/UBKhuNmXlNw=; b=h6W4UHNVXBKHondIK8rDGaR28qJJ5gL9RHhk1KSMGskYnIxilFWeOJ/bGpHDDX1lls5HYT XPXb9xrUUPBpxzBg== Received: from alsa1.suse.de (alsa1.suse.de [10.160.4.42]) by relay2.suse.de (Postfix) with ESMTP id B2109A3B84; Mon, 29 Nov 2021 16:42:59 +0000 (UTC) Date: Mon, 29 Nov 2021 17:42:59 +0100 Message-ID: From: Takashi Iwai To: Pierre-Louis Bossart Cc: Thomas Gleixner , LKML , Jaroslav Kysela , Takashi Iwai , Cezary Rojewski , Liam Girdwood , Jie Yang , alsa-devel@alsa-project.org Subject: Re: ALSA: hda: Make proper use of timecounter In-Reply-To: <4c1b9ecd-cefe-f890-f309-39d602201d58@linux.intel.com> References: <871r35kwji.ffs@tglx> <4c1b9ecd-cefe-f890-f309-39d602201d58@linux.intel.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI/1.14.6 (Maruoka) FLIM/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL/10.8 Emacs/25.3 (x86_64-suse-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI 1.14.6 - "Maruoka") Content-Type: text/plain; charset=US-ASCII Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, 29 Nov 2021 17:06:40 +0100, Pierre-Louis Bossart wrote: > > > > On 11/24/21 4:40 PM, Thomas Gleixner wrote: > > HDA uses a timecounter to read a hardware clock running at 24 MHz. The > > conversion factor is set with a mult value of 125 and a shift value of 0, > > which is not converting the hardware clock to nanoseconds, it is converting > > to 1/3 nanoseconds because the conversion factor from 24Mhz to nanoseconds > > is 125/3. The usage sites divide the "nanoseconds" value returned by > > timecounter_read() by 3 to get a real nanoseconds value. > > > > There is a lengthy comment in azx_timecounter_init() explaining this > > choice. That comment makes blatantly wrong assumptions about how > > timecounters work and what can overflow. > > > > The comment says: > > > > * Applying the 1/3 factor as part of the multiplication > > * requires at least 20 bits for a decent precision, however > > * overflows occur after about 4 hours or less, not a option. > > > > timecounters operate on time deltas between two readouts of a clock and use > > the mult/shift pair to calculate a precise nanoseconds value: > > > > delta_nsec = (delta_clock * mult) >> shift; > > > > The fractional part is also taken into account and preserved to prevent > > accumulated rounding errors. For details see cyclecounter_cyc2ns(). > > > > The mult/shift pair has to be chosen so that the multiplication of the > > maximum expected delta value does not result in a 64bit overflow. As the > > counter wraps around on 32bit, the maximum observable delta between two > > reads is (1 << 32) - 1 which is about 178.9 seconds. > > > > That in turn means the maximum multiplication factor which fits into an u32 > > will not cause a 64bit overflow ever because it's guaranteed that: > > > > ((1 << 32) - 1) ^ 2 < (1 << 64) > > > > The resulting correct multiplication factor is 2796202667 and the shift > > value is 26, i.e. 26 bit precision. The overflow of the multiplication > > would happen exactly at a clock readout delta of 6597069765 which is way > > after the wrap around of the hardware clock at around 274.8 seconds which > > is off from the claimed 4 hours by more than an order of magnitude. > > > > If the counter ever wraps around the last read value then the calculation > > is off by the number of wrap arounds times 178.9 seconds because the > > overflow cannot be observed. > > > > Use clocks_calc_mult_shift(), which calculates the most accurate mult/shift > > pair based on the given clock frequency, and remove the bogus comment along > > with the divisions at the readout sites. > > > > Fixes: 5d890f591d15 ("ALSA: hda: support for wallclock timestamps") > > Signed-off-by: Thomas Gleixner > > I don't recall the reason of why I added separate steps for > multiplication by 125 and division by 3 back in 2012, but obviously they > weren't aligned with my own comment "Max buffer time is limited to 178 > seconds to make sure wall clock counter does not overflow". > > Thanks for the patch, much appreciated. > > Reviewed-by: Pierre-Louis Bossart Now queued to for-next branch. Thanks. Takashi