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Subject: Re: [PATCH V4 1/2] dt-bindings: riscv: add MMU Standard Extensions
 support for Svpbmt
From:   Jessica Clarke <jrtc27@jrtc27.com>
In-Reply-To: <1909580.k68io2XIxi@diego>
Date:   Tue, 30 Nov 2021 13:17:41 +0000
Cc:     Wei Fu <wefu@redhat.com>,
        linux-riscv <linux-riscv@lists.infradead.org>,
        "linux-kernel@vger.kernel.org List" <linux-kernel@vger.kernel.org>,
        taiten.peng@canonical.com, aniket.ponkshe@canonical.com,
        gordan.markus@canonical.com, Guo Ren <guoren@linux.alibaba.com>,
        arnd@arndb.de, wens@csie.org, maxime@cerno.tech,
        Dan Lustig <dlustig@nvidia.com>,
        Greg Favor <gfavor@ventanamicro.com>,
        andrea.mondelli@huawei.com, behrensj@mit.edu, xinhaoqu@huawei.com,
        huffman@cadence.com, Nick Kossifidis <mick@ics.forth.gr>,
        Allen Baum <allen.baum@esperantotech.com>,
        jscheid@ventanamicro.com, rtrauben@gmail.com,
        Anup Patel <anup@brainfault.org>,
        Rob Herring <robh+dt@kernel.org>,
        Anup Patel <anup.patel@wdc.com>, atishp04@gmail.com,
        Palmer Dabbelt <palmer@dabbelt.com>,
        Guo Ren <guoren@kernel.org>,
        =?utf-8?Q?Christoph_M=C3=BCllner?= <christoph.muellner@vrull.eu>,
        Philipp Tomsich <philipp.tomsich@vrull.eu>, hch@lst.de,
        liush@allwinnertech.com, Wei Wu <lazyparser@gmail.com>,
        drew@beagleboard.org,
        Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
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References: <20211129014007.286478-1-wefu@redhat.com>
 <97431cab-d67d-4bc7-e181-d64534791f03@canonical.com>
 <9930802.MB9u6SvQ6m@diego> <1909580.k68io2XIxi@diego>
To:     =?utf-8?Q?Heiko_St=C3=BCbner?= <heiko@sntech.de>
Precedence: bulk

On 30 Nov 2021, at 12:07, Heiko St=C3=BCbner <heiko@sntech.de> wrote:
>=20
> Am Montag, 29. November 2021, 13:06:23 CET schrieb Heiko St=C3=BCbner:
>> Am Montag, 29. November 2021, 09:54:39 CET schrieb Heinrich =
Schuchardt:
>>> On 11/29/21 02:40, wefu@redhat.com wrote:
>>>> From: Wei Fu <wefu@redhat.com>
>>>>=20
>>>> Previous patch has added svpbmt in arch/riscv and add =
"riscv,svpmbt"
>>>> in the DT mmu node. Update dt-bindings related property here.
>>>>=20
>>>> Signed-off-by: Wei Fu <wefu@redhat.com>
>>>> Co-developed-by: Guo Ren <guoren@kernel.org>
>>>> Signed-off-by: Guo Ren <guoren@kernel.org>
>>>> Cc: Anup Patel <anup@brainfault.org>
>>>> Cc: Palmer Dabbelt <palmer@dabbelt.com>
>>>> Cc: Rob Herring <robh+dt@kernel.org>
>>>> ---
>>>>  Documentation/devicetree/bindings/riscv/cpus.yaml | 10 ++++++++++
>>>>  1 file changed, 10 insertions(+)
>>>>=20
>>>> diff --git a/Documentation/devicetree/bindings/riscv/cpus.yaml =
b/Documentation/devicetree/bindings/riscv/cpus.yaml
>>>> index aa5fb64d57eb..9ff9cbdd8a85 100644
>>>> --- a/Documentation/devicetree/bindings/riscv/cpus.yaml
>>>> +++ b/Documentation/devicetree/bindings/riscv/cpus.yaml
>>>> @@ -63,6 +63,16 @@ properties:
>>>>        - riscv,sv48
>>>>        - riscv,none
>>>>=20
>>>> +  mmu:
>>>=20
>>> Shouldn't we keep the items be in alphabetic order, i.e. mmu before=20=

>>> mmu-type?
>>>=20
>>>> +    description:
>>>> +      Describes the CPU's MMU Standard Extensions support.
>>>> +      These values originate from the RISC-V Privileged
>>>> +      Specification document, available from
>>>> +      https://riscv.org/specifications/
>>>> +    $ref: '/schemas/types.yaml#/definitions/string'
>>>> +    enum:
>>>> +      - riscv,svpmbt
>>>=20
>>> The privileged specification has multiple MMU related extensions:=20
>>> Svnapot, Svpbmt, Svinval. Shall they all be modeled in this enum?
>>=20
>> I remember in some earlier version some way back there was the
>> suggestion of using a sub-node instead and then adding boolean
>> properties for the supported extensions.
>>=20
>> Aka something like
>> 	mmu {
>> 		riscv,svpbmt;=09
>> 	};
>=20
> For the record, I'm talking about the mail from september
> =
https://lore.kernel.org/linux-riscv/CAAeLtUChjjzG+P8yg45GLZMJy5UR2K5RRBoLF=
VZhtOaZ5pPtEA@mail.gmail.com/
>=20
> So having a sub-node would make adding future extensions
> way nicer.

Svpbmt is just an ISA extension, and should be treated like any other.
Let=E2=80=99s not invent two different ways of representing that in the =
device
tree.

Jess