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[96.230.249.157]) by smtp.gmail.com with ESMTPSA id h13sm11240708qtk.25.2021.11.30.12.28.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 30 Nov 2021 12:28:40 -0800 (PST) Message-ID: Subject: Re: [PATCH v2] drm/i915/dp: Perform 30ms delay after source OUI write From: Lyude Paul To: Jani Nikula , intel-gfx@lists.freedesktop.org Cc: Ville =?ISO-8859-1?Q?Syrj=E4l=E4?= , stable@vger.kernel.org, Joonas Lahtinen , Rodrigo Vivi , Tvrtko Ursulin , David Airlie , Daniel Vetter , Imre Deak , =?ISO-8859-1?Q?Jos=E9?= Roberto de Souza , Uma Shankar , Anshuman Gupta , Dave Airlie , Gwan-gyeong Mun , Manasi Navare , Ankit Nautiyal , "open list:DRM DRIVERS" , open list Date: Tue, 30 Nov 2021 15:28:39 -0500 In-Reply-To: <871r2yj5fp.fsf@intel.com> References: <20211129233354.101347-1-lyude@redhat.com> <871r2yj5fp.fsf@intel.com> Organization: Red Hat Inc. Content-Type: text/plain; charset="UTF-8" User-Agent: Evolution 3.42.1 (3.42.1-1.fc35) MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, 2021-11-30 at 12:36 +0200, Jani Nikula wrote: > On Mon, 29 Nov 2021, Lyude Paul wrote: > > While working on supporting the Intel HDR backlight interface, I noticed > > that there's a couple of laptops that will very rarely manage to boot up > > without detecting Intel HDR backlight support - even though it's supported > > on the system. One example of such a laptop is the Lenovo P17 1st > > generation. > > > > Following some investigation Ville Syrjälä did through the docs they have > > available to them, they discovered that there's actually supposed to be a > > 30ms wait after writing the source OUI before we begin setting up the rest > > of the backlight interface. > > > > This seems to be correct, as adding this 30ms delay seems to have > > completely fixed the probing issues I was previously seeing. So - let's > > start performing a 30ms wait after writing the OUI, which we do in a > > manner > > similar to how we keep track of PPS delays (e.g. record the timestamp of > > the OUI write, and then wait for however many ms are left since that > > timestamp right before we interact with the backlight) in order to avoid > > waiting any longer then we need to. As well, this also avoids us > > performing > > this delay on systems where we don't end up using the HDR backlight > > interface. > > > > V2: > > * Move panel delays into intel_pps > > > > Signed-off-by: Lyude Paul > > Fixes: 4a8d79901d5b ("drm/i915/dp: Enable Intel's HDR backlight interface > > (only SDR for now)") > > Cc: Ville Syrjälä > > Cc: # v5.12+ > > --- > >  drivers/gpu/drm/i915/display/intel_display_types.h    |  4 ++++ > >  drivers/gpu/drm/i915/display/intel_dp.c               | 11 +++++++++++ > >  drivers/gpu/drm/i915/display/intel_dp.h               |  2 ++ > >  drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c |  5 +++++ > >  4 files changed, 22 insertions(+) > > > > diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h > > b/drivers/gpu/drm/i915/display/intel_display_types.h > > index ea1e8a6e10b0..ad64f9caa7ff 100644 > > --- a/drivers/gpu/drm/i915/display/intel_display_types.h > > +++ b/drivers/gpu/drm/i915/display/intel_display_types.h > > @@ -1485,6 +1485,7 @@ struct intel_pps { > >         bool want_panel_vdd; > >         unsigned long last_power_on; > >         unsigned long last_backlight_off; > > +       unsigned long last_oui_write; > >         ktime_t panel_power_off_time; > >         intel_wakeref_t vdd_wakeref; > >   > > @@ -1653,6 +1654,9 @@ struct intel_dp { > >         struct intel_dp_pcon_frl frl; > >   > >         struct intel_psr psr; > > + > > +       /* When we last wrote the OUI for eDP */ > > +       unsigned long last_oui_write; > > Now you're adding last_oui_write to both intel_pps and intel_dp, forgot > to git add? ;) Yep :P, will send out a different version in a bit > > I guess I'd add this to intel_dp only, because it's not strictly about > PPS. I just wanted the mechanism to be similar to that. > > >  }; > >   > >  enum lspcon_vendor { > > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c > > b/drivers/gpu/drm/i915/display/intel_dp.c > > index 0a424bf69396..45318891ba07 100644 > > --- a/drivers/gpu/drm/i915/display/intel_dp.c > > +++ b/drivers/gpu/drm/i915/display/intel_dp.c > > @@ -29,6 +29,7 @@ > >  #include > >  #include > >  #include > > +#include > >  #include > >   > >  #include > > @@ -2010,6 +2011,16 @@ intel_edp_init_source_oui(struct intel_dp > > *intel_dp, bool careful) > >   > >         if (drm_dp_dpcd_write(&intel_dp->aux, DP_SOURCE_OUI, oui, > > sizeof(oui)) < 0) > >                 drm_err(&i915->drm, "Failed to write source OUI\n"); > > + > > +       intel_dp->pps.last_oui_write = jiffies; > > Set to intel_dp->last_oui_write. > > With those fixes, > > Reviewed-by: Jani Nikula > > > > +} > > + > > +void intel_dp_wait_source_oui(struct intel_dp *intel_dp) > > +{ > > +       struct drm_i915_private *i915 = dp_to_i915(intel_dp); > > + > > +       drm_dbg_kms(&i915->drm, "Performing OUI wait\n"); > > +       wait_remaining_ms_from_jiffies(intel_dp->last_oui_write, 30); > >  } > >   > >  /* If the device supports it, try to set the power state appropriately */ > > diff --git a/drivers/gpu/drm/i915/display/intel_dp.h > > b/drivers/gpu/drm/i915/display/intel_dp.h > > index ce229026dc91..b64145a3869a 100644 > > --- a/drivers/gpu/drm/i915/display/intel_dp.h > > +++ b/drivers/gpu/drm/i915/display/intel_dp.h > > @@ -119,4 +119,6 @@ void intel_dp_pcon_dsc_configure(struct intel_dp > > *intel_dp, > >                                  const struct intel_crtc_state > > *crtc_state); > >  void intel_dp_phy_test(struct intel_encoder *encoder); > >   > > +void intel_dp_wait_source_oui(struct intel_dp *intel_dp); > > + > >  #endif /* __INTEL_DP_H__ */ > > diff --git a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c > > b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c > > index 8b9c925c4c16..62c112daacf2 100644 > > --- a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c > > +++ b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c > > @@ -36,6 +36,7 @@ > >   > >  #include "intel_backlight.h" > >  #include "intel_display_types.h" > > +#include "intel_dp.h" > >  #include "intel_dp_aux_backlight.h" > >   > >  /* TODO: > > @@ -106,6 +107,8 @@ intel_dp_aux_supports_hdr_backlight(struct > > intel_connector *connector) > >         int ret; > >         u8 tcon_cap[4]; > >   > > +       intel_dp_wait_source_oui(intel_dp); > > + > >         ret = drm_dp_dpcd_read(aux, INTEL_EDP_HDR_TCON_CAP0, tcon_cap, > > sizeof(tcon_cap)); > >         if (ret != sizeof(tcon_cap)) > >                 return false; > > @@ -204,6 +207,8 @@ intel_dp_aux_hdr_enable_backlight(const struct > > intel_crtc_state *crtc_state, > >         int ret; > >         u8 old_ctrl, ctrl; > >   > > +       intel_dp_wait_source_oui(intel_dp); > > + > >         ret = drm_dp_dpcd_readb(&intel_dp->aux, > > INTEL_EDP_HDR_GETSET_CTRL_PARAMS, &old_ctrl); > >         if (ret != 1) { > >                 drm_err(&i915->drm, "Failed to read current backlight > > control mode: %d\n", ret); > -- Cheers, Lyude Paul (she/her) Software Engineer at Red Hat