Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 14DBCC433F5 for ; Wed, 1 Dec 2021 16:15:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1351579AbhLAQSJ (ORCPT ); Wed, 1 Dec 2021 11:18:09 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41612 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1351484AbhLAQQJ (ORCPT ); Wed, 1 Dec 2021 11:16:09 -0500 X-Greylist: delayed 289 seconds by postgrey-1.37 at lindbergh.monkeyblade.net; Wed, 01 Dec 2021 08:12:46 PST Received: from relay03.th.seeweb.it (relay03.th.seeweb.it [IPv6:2001:4b7a:2000:18::164]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 109FBC061574; Wed, 1 Dec 2021 08:12:42 -0800 (PST) Received: from IcarusMOD.eternityproject.eu (unknown [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by m-r1.th.seeweb.it (Postfix) with ESMTPSA id 4DFC1200D9; Wed, 1 Dec 2021 17:12:40 +0100 (CET) Subject: Re: [PATCH 3/3] arm64: dt: qcom: sm6125.dtsi: Add dispcc To: Marijn Suijten , Martin Botka Cc: martin.botka1@gmail.com, ~postmarketos/upstreaming@lists.sr.ht, konrad.dybcio@somainline.org, jamipkettunen@somainline.org, paul.bouchara@somainline.org, Andy Gross , Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org References: <20211130212137.25303-1-martin.botka@somainline.org> <20211130212137.25303-3-martin.botka@somainline.org> <20211201155128.sasoiv3awjcfrjhw@SoMainline.org> From: AngeloGioacchino Del Regno Message-ID: Date: Wed, 1 Dec 2021 17:12:39 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.13.0 MIME-Version: 1.0 In-Reply-To: <20211201155128.sasoiv3awjcfrjhw@SoMainline.org> Content-Type: text/plain; charset=iso-8859-15; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Il 01/12/21 16:51, Marijn Suijten ha scritto: > On 2021-11-30 22:21:34, Martin Botka wrote: >> Add the dispcc node from the newly added DISPCC >> driver for Qualcomm Technology Inc's SM6125 SoC. >> >> Signed-off-by: Martin Botka >> --- >> arch/arm64/boot/dts/qcom/sm6125.dtsi | 12 ++++++++++++ >> 1 file changed, 12 insertions(+) >> >> diff --git a/arch/arm64/boot/dts/qcom/sm6125.dtsi b/arch/arm64/boot/dts/qcom/sm6125.dtsi >> index 51286ddbdb10..78f4705e4117 100644 >> --- a/arch/arm64/boot/dts/qcom/sm6125.dtsi >> +++ b/arch/arm64/boot/dts/qcom/sm6125.dtsi >> @@ -3,6 +3,7 @@ >> * Copyright (c) 2021, Martin Botka >> */ >> >> +#include >> #include >> #include >> #include >> @@ -317,6 +318,17 @@ soc { >> ranges = <0x00 0x00 0x00 0xffffffff>; >> compatible = "simple-bus"; >> >> + dispcc: clock-controller@5f00000 { >> + #address-cells = <1>; >> + #size-cells = <1>; >> + compatible = "qcom,dispcc-sm6125"; >> + reg = <0x5f00000 0x20000>; >> + clocks = <&gcc GCC_DISP_AHB_CLK>; >> + clock-names = "cfg_ahb_clk"; > > It looks like this lacks all the clocks that are supposedly required as > per the yaml DT bindings provided in patch 1/3 - should those be added > and set to `<0>` where unavailable, otherwise dtbs_check may not pass? > Yes, Marijn. They should. Please Martin, add the missing clocks for v2.