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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: AS8PR04MB8676.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 66aa293d-2c0f-4285-a087-08d9b558a0f0 X-MS-Exchange-CrossTenant-originalarrivaltime: 02 Dec 2021 05:57:30.9986 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: CWckKSaWI/XUdhCM/VBqtMWvFX8cqRFipyI3v3lDfgri3qydQ+bl7OEx03aPewz3Ahgsncxhcgao2AllU8cASA== X-MS-Exchange-Transport-CrossTenantHeadersStamped: AS8PR04MB8644 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org > -----Original Message----- > From: Vinod Koul > Sent: Thursday, December 2, 2021 12:30 PM > To: Hongxing Zhu > Cc: l.stach@pengutronix.de; bhelgaas@google.com; > lorenzo.pieralisi@arm.com; Marcel Ziswiler > ; tharvey@gateworks.com; > kishon@ti.com; robh@kernel.org; galak@kernel.crashing.org; > shawnguo@kernel.org; linux-phy@lists.infradead.org; > devicetree@vger.kernel.org; linux-pci@vger.kernel.org; > linux-arm-kernel@lists.infradead.org; linux-kernel@vger.kernel.org; > kernel@pengutronix.de; dl-linux-imx > Subject: Re: [PATCH v6 5/8] phy: freescale: pcie: Initialize the imx8 pci= e > standalone phy driver >=20 > On 18-11-21, 09:54, Richard Zhu wrote: > > Add the standalone i.MX8 PCIe PHY driver. > > > > Signed-off-by: Richard Zhu > > Tested-by: Marcel Ziswiler > > Reviewed-by: Tim Harvey > > Tested-by: Tim Harvey > > --- > > drivers/phy/freescale/Kconfig | 9 + > > drivers/phy/freescale/Makefile | 1 + > > drivers/phy/freescale/phy-fsl-imx8m-pcie.c | 237 > > +++++++++++++++++++++ > > 3 files changed, 247 insertions(+) > > create mode 100644 drivers/phy/freescale/phy-fsl-imx8m-pcie.c > > > > diff --git a/drivers/phy/freescale/Kconfig > > b/drivers/phy/freescale/Kconfig index 320630ffe3cd..e821498b1f7f > > 100644 > > --- a/drivers/phy/freescale/Kconfig > > +++ b/drivers/phy/freescale/Kconfig > > @@ -14,3 +14,12 @@ config PHY_MIXEL_MIPI_DPHY > > help > > Enable this to add support for the Mixel DSI PHY as found > > on NXP's i.MX8 family of SOCs. > > + > > +config PHY_FSL_IMX8M_PCIE > > + tristate "Freescale i.MX8M PCIE PHY" > > + depends on OF && HAS_IOMEM > > + select GENERIC_PHY > > + default ARCH_MXC && ARM64 >=20 > Why should this be default ? We dont do that for new drivers.. You may > add this to respective config file though... >=20 [Richard Zhu] First of all, thanks a lot for your review comments. I see, and would remove the default in the kconfig. > > +static int imx8_pcie_phy_init(struct phy *phy) { > > + int ret; > > + u32 val, pad_mode; > > + struct imx8_pcie_phy *imx8_phy =3D phy_get_drvdata(phy); > > + > > + reset_control_assert(imx8_phy->reset); > > + > > + pad_mode =3D imx8_phy->refclk_pad_mode; > > + /* Set AUX_EN_OVERRIDE 1'b0, when the CLKREQ# isn't hooked */ > > + regmap_update_bits(imx8_phy->iomuxc_gpr, IOMUXC_GPR14, > > + IMX8MM_GPR_PCIE_AUX_EN_OVERRIDE, > > + imx8_phy->clkreq_unused ? > > + 0 : IMX8MM_GPR_PCIE_AUX_EN_OVERRIDE); > > + regmap_update_bits(imx8_phy->iomuxc_gpr, IOMUXC_GPR14, > > + IMX8MM_GPR_PCIE_AUX_EN, > > + IMX8MM_GPR_PCIE_AUX_EN); > > + regmap_update_bits(imx8_phy->iomuxc_gpr, IOMUXC_GPR14, > > + IMX8MM_GPR_PCIE_POWER_OFF, 0); > > + regmap_update_bits(imx8_phy->iomuxc_gpr, IOMUXC_GPR14, > > + IMX8MM_GPR_PCIE_SSC_EN, 0); > > + > > + regmap_update_bits(imx8_phy->iomuxc_gpr, IOMUXC_GPR14, > > + IMX8MM_GPR_PCIE_REF_CLK_SEL, > > + pad_mode =3D=3D IMX8_PCIE_REFCLK_PAD_INPUT ? > > + IMX8MM_GPR_PCIE_REF_CLK_EXT : > > + IMX8MM_GPR_PCIE_REF_CLK_PLL); > > + usleep_range(100, 200); > > + > > + /* Do the PHY common block reset */ > > + regmap_update_bits(imx8_phy->iomuxc_gpr, IOMUXC_GPR14, > > + IMX8MM_GPR_PCIE_CMN_RST, > > + IMX8MM_GPR_PCIE_CMN_RST); > > + usleep_range(200, 500); > > + > > + >=20 > No multi blank line please [Richard Zhu] Ok, got that. >=20 > > +static struct platform_driver imx8_pcie_phy_driver =3D { > > + .probe =3D imx8_pcie_phy_probe, > > + .driver =3D { > > + .name =3D "imx8-pcie-phy", > > + .of_match_table =3D imx8_pcie_phy_of_match, > > + } > > +}; > > +module_platform_driver(imx8_pcie_phy_driver); > > + > > +MODULE_DESCRIPTION("FSL IMX8 PCIE PHY driver"); > > +MODULE_LICENSE("GPL"); >=20 > This does not match the SPDX tag you have given [Richard Zhu] Should the "GPL v2" correct one? If yes, I would change it this way later. Thanks. Best Regards Richard >=20 > -- > ~Vinod