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[89.77.68.124]) by smtp.gmail.com with ESMTPSA id w8sm256217lfe.183.2021.12.02.00.25.09 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 02 Dec 2021 00:25:09 -0800 (PST) Message-ID: Date: Thu, 2 Dec 2021 09:25:09 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.3.1 Subject: Re: [PATCH 3/6] dt-bindings: i2c: exynos5: Add bus clock Content-Language: en-US To: Sam Protsenko , Rob Herring Cc: Jaewon Kim , Chanho Park , David Virag , Youngmin Nam , Wolfram Sang , Arnd Bergmann , linux-i2c@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org References: <20211201190455.31646-1-semen.protsenko@linaro.org> <20211201190455.31646-4-semen.protsenko@linaro.org> From: Krzysztof Kozlowski In-Reply-To: <20211201190455.31646-4-semen.protsenko@linaro.org> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 01/12/2021 20:04, Sam Protsenko wrote: > In new Exynos SoCs (like Exynos850) where HSI2C is implemented as a > part of USIv2 block, there are two clocks provided to HSI2C controller: > - PCLK: bus clock (APB), provides access to register interface > - IPCLK: operating IP-core clock; SCL is derived from this one > > Both clocks have to be asserted for HSI2C to be functional in that case. > > Modify bindings doc to allow specifying bus clock in addition to > already described operating clock. Make it optional though, as older > Exynos SoC variants only have one HSI2C clock. I understand that it is required on newer SoCs, so you need "if:" adding it to required properties on Autov8 or 850. > > Signed-off-by: Sam Protsenko > --- > .../devicetree/bindings/i2c/i2c-exynos5.yaml | 11 ++++++++--- > 1 file changed, 8 insertions(+), 3 deletions(-) > > diff --git a/Documentation/devicetree/bindings/i2c/i2c-exynos5.yaml b/Documentation/devicetree/bindings/i2c/i2c-exynos5.yaml > index db20e703dea0..a212c1d5e7d9 100644 > --- a/Documentation/devicetree/bindings/i2c/i2c-exynos5.yaml > +++ b/Documentation/devicetree/bindings/i2c/i2c-exynos5.yaml > @@ -49,11 +49,16 @@ properties: > clock-frequency is >= 1MHz. > > clocks: > - maxItems: 1 > - description: I2C operating clock > + minItems: 1 > + items: > + - description: I2C operating clock > + - description: Bus clock (APB) > > clock-names: > - const: hsi2c > + minItems: 1 > + items: > + - const: hsi2c > + - const: hsi2c_pclk > > required: > - compatible > Best regards, Krzysztof