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Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB03.amd.com; Received: from SATLEXMB03.amd.com (165.204.84.17) by CO1NAM11FT028.mail.protection.outlook.com (10.13.175.214) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.4755.13 via Frontend Transport; Fri, 3 Dec 2021 02:00:33 +0000 Received: from yaz-ethanolx.amd.com (10.180.168.240) by SATLEXMB03.amd.com (10.181.40.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.17; Thu, 2 Dec 2021 20:00:31 -0600 From: Yazen Ghannam To: CC: , , , , , , , Yazen Ghannam Subject: [PATCH 0/3] AMD SMCA Updates Date: Fri, 3 Dec 2021 02:00:14 +0000 Message-ID: <20211203020017.728440-1-yazen.ghannam@amd.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB03.amd.com (10.181.40.144) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 752419ff-e838-47f4-c7be-08d9b600b0de X-MS-TrafficTypeDiagnostic: BN7PR12MB2755: X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:7219; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 03 Dec 2021 02:00:33.1718 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 752419ff-e838-47f4-c7be-08d9b600b0de X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT028.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN7PR12MB2755 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi all, This set adds supports for SMCA changes in future AMD systems. Patch 1 adds an "unknown" bank type so that sysfs initialization issues can be avoided on systems with new bank types. Patch 2 adds new bank types and error descriptions used in future AMD systems. Patch 3 adjusts how SMCA bank information is cached. Future AMD systems will have different bank type layouts between logical CPUs. So having a single system-wide cache of the layout won't be correct. Thanks, Yazen Yazen Ghannam (3): x86/MCE/AMD: Provide an "Unknown" MCA bank type x86/MCE/AMD, EDAC/mce_amd: Add new SMCA Bank Types x86/MCE/AMD, EDAC/mce_amd: Support non-uniform MCA bank type enumeration arch/x86/include/asm/mce.h | 26 ++--- arch/x86/kernel/cpu/mce/amd.c | 114 +++++++++++++----- drivers/edac/mce_amd.c | 148 +++++++++++++++++++++--- drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 2 +- 4 files changed, 228 insertions(+), 62 deletions(-) -- 2.25.1