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b=njaMDBdUrrcLs4IXhCzKN3k7M4vAO7by8dWKeqgxbzEvHrPx0+jHc0TH0TheQpR+FdtaSCU4+4Am+lFhm4sRBAEIRi4PvWQUqLfCrNq+c+4sVvyrWTookuNIobODHlfgvQPGbUnGNvxVslgNkmiaxdkctUKSnF4LBAV7nsNw4sY= Received: from AS8PR04MB8676.eurprd04.prod.outlook.com (2603:10a6:20b:42b::10) by AS8PR04MB8707.eurprd04.prod.outlook.com (2603:10a6:20b:42a::24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4734.23; Fri, 3 Dec 2021 02:12:38 +0000 Received: from AS8PR04MB8676.eurprd04.prod.outlook.com ([fe80::b059:46c6:685b:e0fc]) by AS8PR04MB8676.eurprd04.prod.outlook.com ([fe80::b059:46c6:685b:e0fc%5]) with mapi id 15.20.4734.028; Fri, 3 Dec 2021 02:12:37 +0000 From: Hongxing Zhu To: Vinod Koul CC: Lorenzo Pieralisi , "l.stach@pengutronix.de" , "bhelgaas@google.com" , Marcel Ziswiler , "tharvey@gateworks.com" , "kishon@ti.com" , "robh@kernel.org" , "galak@kernel.crashing.org" , "shawnguo@kernel.org" , "linux-phy@lists.infradead.org" , "devicetree@vger.kernel.org" , "linux-pci@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "linux-kernel@vger.kernel.org" , "kernel@pengutronix.de" , dl-linux-imx Subject: RE: [PATCH v6 0/8] Add the imx8m pcie phy driver and imx8mm pcie support Thread-Topic: [PATCH v6 0/8] Add the imx8m pcie phy driver and imx8mm pcie support Thread-Index: AQHX3CMFKmekc+YLiESKUzSHx70p1awdqgqAgAEThyCAAA69gIABTGIg Date: Fri, 3 Dec 2021 02:12:37 +0000 Message-ID: References: <1637200489-11855-1-git-send-email-hongxing.zhu@nxp.com> <20211201124419.GA13080@lpieralisi> In-Reply-To: Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=nxp.com; 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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: AS8PR04MB8676.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 73f6ece8-4c5c-4ae5-af81-08d9b60260c7 X-MS-Exchange-CrossTenant-originalarrivaltime: 03 Dec 2021 02:12:37.8141 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: KucthsnSy8jGHl9qkjL2cHBrRYnIDQbjxpeQG4sDFHsXcGYpk6vy9CDNYVqJ+BwbQx+TBj0H5hTDKdzsY/ohXQ== X-MS-Exchange-Transport-CrossTenantHeadersStamped: AS8PR04MB8707 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org > -----Original Message----- > From: Vinod Koul > Sent: Thursday, December 2, 2021 2:03 PM > To: Hongxing Zhu > Cc: Lorenzo Pieralisi ; > l.stach@pengutronix.de; bhelgaas@google.com; Marcel Ziswiler > ; tharvey@gateworks.com; > kishon@ti.com; robh@kernel.org; galak@kernel.crashing.org; > shawnguo@kernel.org; linux-phy@lists.infradead.org; > devicetree@vger.kernel.org; linux-pci@vger.kernel.org; > linux-arm-kernel@lists.infradead.org; linux-kernel@vger.kernel.org; > kernel@pengutronix.de; dl-linux-imx > Subject: Re: [PATCH v6 0/8] Add the imx8m pcie phy driver and imx8mm > pcie support >=20 > On 02-12-21, 05:43, Hongxing Zhu wrote: > > > -----Original Message----- > > > From: Lorenzo Pieralisi > > > Sent: Wednesday, December 1, 2021 8:44 PM > > > To: Hongxing Zhu > > > Cc: l.stach@pengutronix.de; bhelgaas@google.com; Marcel Ziswiler > > > ; tharvey@gateworks.com; > kishon@ti.com; > > > vkoul@kernel.org; robh@kernel.org; galak@kernel.crashing.org; > > > shawnguo@kernel.org; linux-phy@lists.infradead.org; > > > devicetree@vger.kernel.org; linux-pci@vger.kernel.org; > > > linux-arm-kernel@lists.infradead.org; > > > linux-kernel@vger.kernel.org; kernel@pengutronix.de; dl-linux-imx > > > > > > Subject: Re: [PATCH v6 0/8] Add the imx8m pcie phy driver and > imx8mm > > > pcie support > > > > > > On Thu, Nov 18, 2021 at 09:54:41AM +0800, Richard Zhu wrote: > > > > Refer to the discussion [1] when try to enable i.MX8MM PCIe > > > > support, one standalone PCIe PHY driver should be seperated from > > > > i.MX PCIe driver when enable i.MX8MM PCIe support. > > > > > > > > This patch-set adds the standalone PCIe PHY driver suport[1-5], > > > > and i.MX8MM PCIe support[6-8] to have whole view to review this > > > patch-set. > > > > > > > > The PCIe works on i.MX8MM EVK board based the the blkctrl power > > > driver > > > > [2] and this patch-set. And tested by Tim and Marcel on the > > > > different reference clock modes boards. > > > > > > > > [1] > > > > > > > > https://eur01.safelinks.protection.outlook.com/?url=3Dhttps%3A%2F%2Fpa > > > tc > > > > > > > > hwork.ozlabs.org%2Fproject%2Flinux-pci%2Fpatch%2F20210510141509. > > > 929120 > > > > > > > > -3-l.stach%40pengutronix.de%2F&data=3D04%7C01%7Chongxing.zhu > > > %40nxp.c > > > > > > > > om%7C3edb11e040e6412cf91108d9b4c85052%7C686ea1d3bc2b4c6fa9 > > > 2cd99c5c3016 > > > > > > > > 35%7C0%7C1%7C637739594698843569%7CUnknown%7CTWFpbGZsb3d > > > 8eyJWIjoiMC4wLj > > > > > > > > AwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000& > > > amp;sdata=3D > > > > > > > > 5xlZSnBYs1SIIbMnmlQwi0qtfLDgKbueLNjPWIPD1pw%3D&reserved=3D > > > 0 > > > > [2] > > > > > > > > https://eur01.safelinks.protection.outlook.com/?url=3Dhttps%3A%2F%2Fpa > > > tc > > > > > > > > hwork.kernel.org%2Fproject%2Flinux-arm-kernel%2Fcover%2F20210910 > > > 202640 > > > > .980366-1-l.stach%40pengutronix.de%2F&data=3D04%7C01%7C > hon > > > gxing.zhu% > > > > > > > > 40nxp.com%7C3edb11e040e6412cf91108d9b4c85052%7C686ea1d3bc2 > > > b4c6fa92cd99 > > > > > > > > c5c301635%7C0%7C1%7C637739594698843569%7CUnknown%7CTWFp > > > bGZsb3d8eyJWIjo > > > > > > > > iMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D% > > > 7C3000& > > > > ;sdata=3D1388J8dLuKUc6KEUnWj5pLpkaPDC4kTIZFF%2BPTspHZY%3D > &a > > > mp;reserved=3D0 > > > > > > > > Main changes v5 --> v6: > > > > - Add "Reviewed-by: Rob Herring " into #1 and > #3 > > > patches. > > > > - Merge Rob's review comments to the #2 patch. > > > > > > > > Main changes v4 --> v5: > > > > - Set the AUX_EN always 1b'1, thus it can fix the regression > > > > introduced > > > in v4 > > > > series on Marcel's board. > > > > - Use the lower-case letter in the devicetreee refer to Marcel's > > > comments. > > > > _ Since the default value of the deemphasis parameters are zero, > > > > only > > > set > > > > the deemphasis registers when the input paramters are none > zero. > > > > > > > > Main changes v3 --> v4: > > > > - Update the yaml to fix syntax error, add maxitems and drop > > > > description of phy > > > > - Correct the clock name in PHY DT node. > > > > - Squash the EVK board relalted dts changes into one patch, and > > > > drop > > > the > > > > useless dummy clock and gpio suffix in DT nodes. > > > > - Add board specific de-emphasis parameters as DT properties. Thus > > > each board > > > > can specify its actual de-emphasis values. > > > > - Update the commit log of PHY driver. > > > > - Remove the useless codes from PCIe driver, since they are moved > > > > to PHY driver > > > > - After the discussion and verification of the CLKREQ# > > > > configurations > > > with Tim, > > > > agree to add an optional boolean property > > > > "fsl,clkreq-unsupported", > > > indicates > > > > the CLKREQ# signal is hooked or not in HW designs. > > > > - Add "Tested-by: Marcel Ziswiler " > > > > tag, > > > since > > > > Marcel help to test the v3 patch-set. > > > > > > > > Main changes v2 --> v3: > > > > - Regarding Lucas' comments. > > > > - to have a whole view to review the patches, send out the > > > > i.MX8MM > > > PCIe support too. > > > > - move the PHY related bits manipulations of the GPR/SRC to > > > standalone PHY driver. > > > > - split the dts changes to SOC and board DT, and use the enum > > > > instead > > > of raw value. > > > > - update the license of the dt-binding header file. > > > > > > > > Changes v1 --> v2: > > > > - Update the license of the dt-binding header file to make the > license > > > > compatible with dts files. > > > > - Fix the dt_binding_check errors. > > > > > > > > Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml | > 6 > > > +++ > > > > Documentation/devicetree/bindings/phy/fsl,imx8-pcie-phy.yaml | > 92 > > > +++++++++++++++++++++++++++++++ > > > > arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi > | > > > 55 +++++++++++++++++++ > > > > arch/arm64/boot/dts/freescale/imx8mm.dtsi > | > > > 46 +++++++++++++++- > > > > drivers/pci/controller/dwc/pci-imx6.c > | > > > 73 ++++++++++++++++++++++--- > > > > drivers/phy/freescale/Kconfig > | > > > 9 ++++ > > > > drivers/phy/freescale/Makefile > | > > > 1 + > > > > drivers/phy/freescale/phy-fsl-imx8m-pcie.c | > > > 237 > > > > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ > > > +++++++++++++++++++++ > > > > include/dt-bindings/phy/phy-imx8-pcie.h > | > > > 14 +++++ > > > > 9 files changed, 525 insertions(+), 8 deletions(-) > > > > > > Hi Richard, > > > > > > I can pull this series into the PCI tree (but not the dts changes > > > that should be routed elsewhere) or give an ACK for patch 8, please > > > let me know what's the best option. > > [Richard Zhu] Hi Lorenzo: > > First of all, thanks a lot for your kindly help. > > To my original understand, #1-3 patch had been reviewed by Rob, might > > be merged into Rob's dt-binding git repos. > > Shawn takes dts changes ( #4, #6 and #7). And PHY driver merged by > > vkoul or Kishon. > > In the end, the PCIe changes(#8) are merged into PCIe git repos. > > > > I'm appreciated if you pull this whole series although I'm not sure > > that you can do it or not. > > Today, I'm glad to receive vkoul's comments about the PHY driver part. > > Let me continue refine the PHY driver, send anther version of this > patch-set. > > Then, let's figure out what's the best option to merge this series. >=20 > I think phy binding and driver changes should go thru phy tree and pcie > binding and driver changes thru pcie tree, dt should be picked by > respective arch tree [Richard Zhu] Hi Vinod: I'm fine with this option. Please help to take the phy binding and driver after the review cycle. Thanks in advanced. Best regards Richard >=20 > -- > ~Vinod