From:   <quic_vamslank@quicinc.com>
To:     <agross@kernel.org>, <bjorn.andersson@linaro.org>,
        <mturquette@baylibre.com>, <sboyd@kernel.org>, <robh+dt@kernel.org>
CC:     <linux-arm-msm@vger.kernel.org>, <linux-clk@vger.kernel.org>,
        <linux-kernel@vger.kernel.org>, <devicetree@vger.kernel.org>,
        <manivannan.sadhasivam@linaro.org>,
        Vamsi Krishna Lanka <quic_vamslank@quicinc.com>
Subject: [PATCH v7 0/3] Add PLL and GCC clock support for SDX65 
Date:   Mon, 6 Dec 2021 23:32:48 -0800
Message-ID: <cover.1638861860.git.quic_vamslank@quicinc.com>
MIME-Version: 1.0
Content-Transfer-Encoding: 8bit
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Precedence: bulk

From: Vamsi Krishna Lanka <quic_vamslank@quicinc.com>

Hello,
Changes from v6:
 - Addressed stephen's comments related to GCC and PLL patches
 - separated PLL and GCC patches from rpmh patches as suggested by Bjorn

Changes from v5:
 - Collected Vinod Koul's and Rob's Reviewed-by for the patches
 - Rebased on the latest tip of Torvald's tree (MAINTAINERS: co-maintain random.c)

Changes from v4:
 - Fixed comments from vinod koul on Clock Alpha PLL and GCC driver support patches
 - Addressed Rob's comments related to GCC dt-binding patch
 - Collected Vinod Koul's Reviewed-by for the dt-bindings patches

Changes from v3:
 - Fixed DTbindings and unused variables errors reported by kernel test bot
 - Rebased on top of v5.16-rc1

Changes from v2:
 - Addressed Taniya Das and Vinod Koul's comments related to adding LUCID_EVO
   PLL type and rpmh support patches
 - Collected Rob's Acked-by for the dt-bindings patches

Changes from v1:
 - Addressed Bjorn's comments related to the GCC support patch
 - Collected Bjorn's and Rob's Reviewed-by for the dt-bindings patches

This patch series adds bindings and device driver changes for GCC, pdc and RPMh
clock support for SDX65 Platform.

Thanks,
Vamsi

Vamsi Krishna Lanka (2):
  clk: qcom: Add LUCID_EVO PLL type for SDX65
  clk: qcom: Add SDX65 GCC support

Vamsi krishna Lanka (1):
  dt-bindings: clock: Add SDX65 GCC clock bindings

 .../bindings/clock/qcom,gcc-sdx65.yaml        |   80 +
 drivers/clk/qcom/Kconfig                      |    8 +
 drivers/clk/qcom/Makefile                     |    1 +
 drivers/clk/qcom/clk-alpha-pll.c              |  204 ++-
 drivers/clk/qcom/clk-alpha-pll.h              |    3 +
 drivers/clk/qcom/gcc-sdx65.c                  | 1611 +++++++++++++++++
 include/dt-bindings/clock/qcom,gcc-sdx65.h    |  122 ++
 7 files changed, 2003 insertions(+), 26 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/clock/qcom,gcc-sdx65.yaml
 create mode 100644 drivers/clk/qcom/gcc-sdx65.c
 create mode 100644 include/dt-bindings/clock/qcom,gcc-sdx65.h


base-commit: 58e1100fdc5990b0cc0d4beaf2562a92e621ac7d
-- 
2.33.1