IronPort-SDR: UeRdx2cceFXeL83qHl7Fb8YFj9VH6bPRZdvc5QhAnWJPrN4H2aLMGArVuX7l83mu2O2tlzR2yz
 A2zjpNNl5KPuTZ9HfFltxfTQeaui0wfBeFJzjTovFpK1iOqQXY/ugb3G3k8fhDqRiIi0ktmXlr
 aBLnjlehvZ3MLFLrYQncnm04Rmv7JqiIKRK3I34RbIvDaXuLLMAZsuuK36l3pvb/FkVYTowAYh
 lazHvx3Ossq7srKlpuwhs3mjNhaesGX2oGHxlj1UfDZwUP4iTFr5diIvetgX/XYhF8fT1jBQzs
 u4haX33SvV4iSuokmyF28yJj
From:   <Ajish.Koshy@microchip.com>
To:     <john.garry@huawei.com>
CC:     <jinpu.wang@cloud.ionos.com>, <jejb@linux.ibm.com>,
        <martin.petersen@oracle.com>, <Viswas.G@microchip.com>,
        <linux-scsi@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
        <damien.lemoal@opensource.wdc.com>, <Niklas.Cassel@wdc.com>,
        <Ajish.Koshy@microchip.com>,
        <Vasanthalakshmi.Tharmarajan@microchip.com>
Subject: RE: [PATCH] scsi: pm8001: Fix phys_to_virt() usage on dma_addr_t
Thread-Topic: [PATCH] scsi: pm8001: Fix phys_to_virt() usage on dma_addr_t
Thread-Index: AQHX4twBpu9E7jx9w0eTfQRflv+fTqwaU8QggArxp4CAAD4CgIABW1WQ
Date:   Tue, 7 Dec 2021 10:36:18 +0000
Message-ID: <PH0PR11MB5112E2E7D00D95F32C86677AEC6E9@PH0PR11MB5112.namprd11.prod.outlook.com>
References: <1637940933-107862-1-git-send-email-john.garry@huawei.com>
 <PH0PR11MB51123148E4932FE1C64F8052EC669@PH0PR11MB5112.namprd11.prod.outlook.com>
 <a60318ef-dc19-a146-5ac3-16eae38b8c37@huawei.com>
 <Ya4PAu4Xj8UGHEV7@x1-carbon>
In-Reply-To: <Ya4PAu4Xj8UGHEV7@x1-carbon>
Accept-Language: en-US
Content-Language: en-US
x-ms-exchange-antispam-messagedata-chunkcount: 1
x-ms-exchange-antispam-messagedata-0: =?us-ascii?Q?Eyeqim8pwv1cRL627Krettd8OVVlQ76eOouYxUu564YmJVRsg09565BR/cwV?=
 =?us-ascii?Q?dVlm8cgFDVe/WWfjoDa6Ol2X6KDZHu2bqEuZq8DCncExjw2OuvMAJ4QD/bFB?=
 =?us-ascii?Q?I+r5gTu27gsVTRhmWG3ryS5tgOhdk5m/B2/DrmfQ8EytiC9yXx6x3KVPCMMk?=
 =?us-ascii?Q?G8f1PFSv0cVc2guUhZF4Emss3w1PueMVskzMhAmR3Jkmcm8OE9wIeAr+h0NA?=
 =?us-ascii?Q?nMun+Srik63Ejp8+qrOSpkIAcPu+GaYiMerA4kfd+4fWhH73xI14Hi4idsqQ?=
 =?us-ascii?Q?+5asvOD2e7lxM6vV2YxE8ApXBuBtzzaoUfos1LlM2Mr32EbrypFbe2Hi1ePE?=
 =?us-ascii?Q?kHYlZfKFDRf52Y8oefrILXTvNE9OadUTAWpiZmLCfyXLDTcOcjBquu7aV2PD?=
 =?us-ascii?Q?3w04mLSGH/48QK5AjUA8Y6a6xDjfg+p79zCIAPcOxqnZqkvpQlBZt0y7DLty?=
 =?us-ascii?Q?JINzSauK1MG5N0L/S/FqY6novWrXZCR9idwX8PtSKX7b2qpJqqqj5g9FGPXJ?=
 =?us-ascii?Q?kYJF1r/EhQYEGgoXYlx1g39CfZplJrGiy9prt1cnV3W+ACPEApphHhQ3nu82?=
 =?us-ascii?Q?XXMYgd1l6It4u9YiPqlKRU7JUUlSj08R6yWctfQ5XleWNFCb0gaxQifLJ7PX?=
 =?us-ascii?Q?Omi7Avl92EZscpGrXAFjHUfIcgNZ2/f7xfAlKbzdSfnWbjkl+ThXmOPbvVJ+?=
 =?us-ascii?Q?AE08Nu9jYShXqiGHAj7a99Y3yb8A/4R1qsBZAc8Gn2qwzcrvcU8xErrKAo1Y?=
 =?us-ascii?Q?y1e6vZiZF/7eslNkuvGFJwJkjm1EIIK0pgwoocraL0qoltacMDY8GT8ypZIj?=
 =?us-ascii?Q?SxC0E/8AZNEk4k2PEv7sx5jqCQvbxte44eXNMweCNJ0Ox93MEsamldo1k1rX?=
 =?us-ascii?Q?XQbobzeTkVopBhB8kITpiae8AZKQQDYsBC0AQFSrOz8/dzGqmqn6CtVuSzgv?=
 =?us-ascii?Q?mcN8lvilA6BWBZT+15Ud0MMqIEdPHX6soAJgVeGIHS/knmdTRvNTyOlcuAUn?=
 =?us-ascii?Q?uNNNWyGY2bD/HdXd0NjCEZh/E7rPl7FKUQ6OOcaN6lCqWhmjJcCnEfaqX9j5?=
 =?us-ascii?Q?XRtwLPw4OgL9Ea9tnKvXWzXzA7R3svV450/RS3q90X3qlu94z1Y+Ruk8Fxg7?=
 =?us-ascii?Q?vZvsLQF+NLXs7HV+im7qZxZO96wP4lyVscTSrQCtNMLk1HDhRjagxaUxy8CS?=
 =?us-ascii?Q?fdW7P3HI7ToCtWPaxMdHKvuTm2k/UJ3dOnFEle7IcnVQapDUKNg5D7Jqat6n?=
 =?us-ascii?Q?wR3NGIERNjt4GPHBeh7daWxwup5jiNJWTgt1iOZrguFKPkrMZmcgE7RvCxEV?=
 =?us-ascii?Q?ChqAxZ8OZC5/x5v/sJkgGDPR/rsaG4VnN0ksVFWUwJp4ksE7MS6RKoxN7AUU?=
 =?us-ascii?Q?m4BISURg8ZoGziiOqUfsHwE6SNy6HmIiTO2M7ZD5Gv59ScklWKrfI6vX7bnO?=
 =?us-ascii?Q?yp1pnA9LatQj5McqHEZxZXYeXahatpC2gNDhGtbeQiOUEYitU6Btg3AepANH?=
 =?us-ascii?Q?oHWt0rTfuzChAP8XkX8IAQSC17KQX1/SZ5459Y1Mgy5lsj+HJG/Ti/VtIgk5?=
 =?us-ascii?Q?phoRAiKEwGwyvT7UWSGxzIzZ6udPL5mp6yqyOuusuyn7ABp1eG2c8M5u7sHG?=
 =?us-ascii?Q?nOHugYb6NTaSexvh5pz5USA1h76Nk+/bBSRcrW9HuGawdYRv9NrBP00ej0oQ?=
 =?us-ascii?Q?jM3phQ=3D=3D?=
Content-Type: text/plain; charset="us-ascii"
Content-Transfer-Encoding: quoted-printable
MIME-Version: 1.0
X-MS-Exchange-CrossTenant-AuthAs: Internal
X-MS-Exchange-CrossTenant-AuthSource: PH0PR11MB5112.namprd11.prod.outlook.com
X-MS-Exchange-CrossTenant-Network-Message-Id: 7b47b77c-3f4d-4f00-db8f-08d9b96d677b
X-MS-Exchange-CrossTenant-originalarrivaltime: 07 Dec 2021 10:36:18.7394
 (UTC)
X-MS-Exchange-CrossTenant-fromentityheader: Hosted
X-MS-Exchange-CrossTenant-id: 3f4057f3-b418-4d4e-ba84-d55b4e897d88
X-MS-Exchange-CrossTenant-mailboxtype: HOSTED
X-MS-Exchange-CrossTenant-userprincipalname: XsqfvTzEMtjktidHCqON/uuiHQ+lNE5+H3TWCSgH++Km5MZWoJo+L/fdpAU6RB+F1RJ1YFk3pbEyzQnD3IXJNwKEAjOiTf/U+OQDEi/6E8M=
X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH0PR11MB4853
Precedence: bulk
List-ID: <linux-kernel.vger.kernel.org>
X-Mailing-List: linux-kernel@vger.kernel.org

Hi John,

Well I could see this kernel panic [  126.843958] RIP: 0010:pm80xx_chip_smp=
_req+0x1d6/0x2e0 [pm80xx] with respect to existing driver on my current sys=
tem x86 64bit after enabling the following 2 kernel boot arguments:
-intel_iommu=3Don
-iommu.passthrough=3D0

Post application of this patch,  now not observing the kernel panic and dev=
ice discovery happens smoothly.


Thanks,
Ajish


=20

-----Original Message-----
From: Niklas Cassel <Niklas.Cassel@wdc.com>=20
Sent: Monday, December 6, 2021 06:54 PM
To: John Garry <john.garry@huawei.com>
Cc: Ajish Koshy - I30923 <Ajish.Koshy@microchip.com>; jinpu.wang@cloud.iono=
s.com; jejb@linux.ibm.com; martin.petersen@oracle.com; Viswas G - I30667 <V=
iswas.G@microchip.com>; linux-scsi@vger.kernel.org; linux-kernel@vger.kerne=
l.org; Damien Le Moal <damien.lemoal@opensource.wdc.com>
Subject: Re: [PATCH] scsi: pm8001: Fix phys_to_virt() usage on dma_addr_t

[Some people who received this message don't often get email from niklas.ca=
ssel@wdc.com. Learn why this is important at http://aka.ms/LearnAboutSender=
Identification.]

EXTERNAL EMAIL: Do not click links or open attachments unless you know the =
content is safe

On Mon, Dec 06, 2021 at 09:42:23AM +0000, John Garry wrote:
> On 29/11/2021 10:46, Ajish.Koshy@microchip.com wrote:
> > Thanks John for the update. Based on the given issue,
> > we never tested on arm server.
> >
> > Further arm testing will depend on the availability of
> > the server.
> >
> > Meanwhile will do further test on x86 and update
> > on the observations.
>
> Have you tested on x86 with the IOMMU enabled? From my limited experience=
,
> out of the box the IOMMU is disabled in the BIOS on x86 machines - that i=
s a
> very general statement. But this is not just an issue specific to arm64.

My limited experience tells me the opposite, that modern x64 servers
have IOMMU enabled by default:

E.g.:
https://www.dell.com/support/manuals/en-uk/poweredge-r7515/r7515_bios_pub/p=
rocessor-settings?guid=3Dguid-ec36d324-4f45-4bc1-bb51-de2db7cc5cd9&lang=3De=
n-us
https://support.hpe.com/hpesc/public/docDisplay?docId=3Da00025662en_us&docL=
ocale=3Den_US


This driver not working properly on a system with an IOMMU just tells
us that the number of mainline users of this driver is very low :/


Kind regards,
Niklas