Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DD7DBC433EF for ; Tue, 7 Dec 2021 11:37:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235755AbhLGLlL (ORCPT ); Tue, 7 Dec 2021 06:41:11 -0500 Received: from lelv0142.ext.ti.com ([198.47.23.249]:52342 "EHLO lelv0142.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229733AbhLGLlK (ORCPT ); Tue, 7 Dec 2021 06:41:10 -0500 Received: from fllv0034.itg.ti.com ([10.64.40.246]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id 1B7BbM5i035913; Tue, 7 Dec 2021 05:37:22 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1638877042; bh=lsPU1sVuM9YQc8e1ZuZsItTT3uiO0gxI5yOh88zpvGA=; h=Subject:To:CC:References:From:Date:In-Reply-To; b=hOIFvibEoFzrWm238T1w03PDbY1hPLs0JhUv5BZFY1SxPJVZy0lUl4ET4ubWtDe+a WWhAEto+wGPyLixlBZSFBssP2HC5FFMEbEbStzfMalnLtxnLOCsycZclrOJITcVzdd wG5q47XiGSYvOY/z8QjC6vwM2CfUwfYJgZ3CaUoM= Received: from DFLE108.ent.ti.com (dfle108.ent.ti.com [10.64.6.29]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 1B7BbLiu033261 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 7 Dec 2021 05:37:22 -0600 Received: from DFLE105.ent.ti.com (10.64.6.26) by DFLE108.ent.ti.com (10.64.6.29) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2308.14; Tue, 7 Dec 2021 05:37:21 -0600 Received: from lelv0327.itg.ti.com (10.180.67.183) by DFLE105.ent.ti.com (10.64.6.26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2308.14 via Frontend Transport; Tue, 7 Dec 2021 05:37:21 -0600 Received: from [10.250.232.32] (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 1B7BbGY4029453; Tue, 7 Dec 2021 05:37:17 -0600 Subject: Re: [PATCH v5 1/6] arm64: dts: ti: k3-am65-mcu: Add Support for MCAN To: Aswath Govindraju CC: Marc Kleine-Budde , Kishon Vijay Abraham I , Faiz Abbas , Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Rob Herring , , , References: <20211122134159.29936-1-a-govindraju@ti.com> <20211122134159.29936-2-a-govindraju@ti.com> From: Apurva Nandan Message-ID: Date: Tue, 7 Dec 2021 17:07:15 +0530 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.14.0 MIME-Version: 1.0 In-Reply-To: <20211122134159.29936-2-a-govindraju@ti.com> Content-Type: text/plain; charset="utf-8"; format=flowed Content-Transfer-Encoding: 7bit Content-Language: en-US X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 22/11/21 7:11 pm, Aswath Govindraju wrote: > From: Faiz Abbas > > Add Support for two MCAN controllers present on the am65x SOC. Both support > classic CAN messages as well as CAN-FD. > > Signed-off-by: Faiz Abbas > Signed-off-by: Aswath Govindraju Reviewed-by: Apurva Nandan > --- > arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi | 30 +++++++++++++++++++++++++ > 1 file changed, 30 insertions(+) > > diff --git a/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi b/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi > index c93ff1520a0e..8d592bf41d6f 100644 > --- a/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi > +++ b/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi > @@ -159,6 +159,36 @@ > }; > }; > > + m_can0: mcan@40528000 { > + compatible = "bosch,m_can"; > + reg = <0x0 0x40528000 0x0 0x400>, > + <0x0 0x40500000 0x0 0x4400>; > + reg-names = "m_can", "message_ram"; > + power-domains = <&k3_pds 102 TI_SCI_PD_EXCLUSIVE>; > + clocks = <&k3_clks 102 5>, <&k3_clks 102 0>; > + clock-names = "hclk", "cclk"; > + interrupt-parent = <&gic500>; > + interrupts = , > + ; > + interrupt-names = "int0", "int1"; > + bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>; > + }; > + > + m_can1: mcan@40568000 { > + compatible = "bosch,m_can"; > + reg = <0x0 0x40568000 0x0 0x400>, > + <0x0 0x40540000 0x0 0x4400>; > + reg-names = "m_can", "message_ram"; > + power-domains = <&k3_pds 103 TI_SCI_PD_EXCLUSIVE>; > + clocks = <&k3_clks 103 5>, <&k3_clks 103 0>; > + clock-names = "hclk", "cclk"; > + interrupt-parent = <&gic500>; > + interrupts = , > + ; > + interrupt-names = "int0", "int1"; > + bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>; > + }; > + > fss: fss@47000000 { > compatible = "simple-bus"; > #address-cells = <2>;