Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 034DEC433F5 for ; Tue, 7 Dec 2021 14:28:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237791AbhLGObd (ORCPT ); Tue, 7 Dec 2021 09:31:33 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44066 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237792AbhLGObb (ORCPT ); Tue, 7 Dec 2021 09:31:31 -0500 Received: from mail-pl1-x629.google.com (mail-pl1-x629.google.com [IPv6:2607:f8b0:4864:20::629]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7CA59C061574; Tue, 7 Dec 2021 06:28:01 -0800 (PST) Received: by mail-pl1-x629.google.com with SMTP id y7so9596324plp.0; Tue, 07 Dec 2021 06:28:01 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=pL2wYs0FKur1p37EfD6cIh4PXL/x/Qnvjj6a9pn8Rhw=; b=iZDooPSKeREMbzGTK/rOP1qCgLIZKq7z06Exaz92jBr7pZl+JvFBkHJeoRtXi8WGUx CsjQJoW0SEOAFeWANpVyoS3LT7AmcnpxQ9NRy9uPdFe5+P0h9p4ED83bPlZKFoYM2woX zzGiG25mIbVi2VahkormwstYkV4+tlChpJ6EYWe2f5A0MKjxSfApxF59aqkRAQp9hUk1 jNJ0QkBM3+SXJRVIuo8/vWXMkgxlOtB4oXIp/vzracb+9spBKsyAr0JmxQ+qTP/CN7wA 9rt62kFB9ZmVM3ejWOaPQb02IlL/rDvx06oBJfXAjQmY6TXEXMgSizkkciWNKOu8J9b4 uyEg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=pL2wYs0FKur1p37EfD6cIh4PXL/x/Qnvjj6a9pn8Rhw=; b=nVUPNtk1ZnJhFqPxvjHGbew1Vj76qtsTKx2lkKQkg9Rpnn1qyjk5Zmx9zQ2/dHh4cE HrXHf21yXHhGxfC+e9p1NlZOOmcNE1oItZXPaOv+bkZlnV5zY6M3ZszKl9AOR7yW/7Xa z27FJxkREkA2qKfLT/G0JDs9J8tBS/olBkw3RJ8PSAMuRGWN9XUHkUj3H7CjYRtTPVxd XvKZ2scKe17Zmc9clfO1DblD+ta0JvS44I/yTBZf9/ejC+UzZf7CPjFzY13etz69czYk W7XH5yhpAlVUfxa1VAkXDJK2q03To84sJQFomKYkeTHWeLoiEQ34qhm1Qm6+t/w5KwCJ HhUQ== X-Gm-Message-State: AOAM530tsmatezy9fKI5V/x6EaYGeqVu4zwnPQwNLcZcesljFNszdjyL jy3I6tujiNpjqBI28Loe9Pr9bOLN5TwHuA== X-Google-Smtp-Source: ABdhPJyVWfE+K4gDkiW5QVaQ3qH9qWM5GM3hElbRdqUEFc7Fnrg7eug0KzwjfW5EJdz90y6s0EtTGw== X-Received: by 2002:a17:902:bd02:b0:142:728b:e475 with SMTP id p2-20020a170902bd0200b00142728be475mr40096049pls.15.1638887280974; Tue, 07 Dec 2021 06:28:00 -0800 (PST) Received: from nj08008nbu.spreadtrum.com ([103.6.5.6]) by smtp.gmail.com with ESMTPSA id d20sm16373247pfl.88.2021.12.07.06.27.55 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Tue, 07 Dec 2021 06:28:00 -0800 (PST) From: Kevin Tang To: maarten.lankhorst@linux.intel.com, mripard@kernel.org, sean@poorly.run, airlied@linux.ie, daniel@ffwll.ch, robh+dt@kernel.org, mark.rutland@arm.com, kevin3.tang@gmail.com, pony1.wu@gmail.com Cc: orsonzhai@gmail.com, zhang.lyra@gmail.com, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org Subject: [PATCH v8 1/6] dt-bindings: display: add Unisoc's drm master bindings Date: Tue, 7 Dec 2021 22:27:12 +0800 Message-Id: <20211207142717.30296-2-kevin3.tang@gmail.com> X-Mailer: git-send-email 2.29.0 In-Reply-To: <20211207142717.30296-1-kevin3.tang@gmail.com> References: <20211207142717.30296-1-kevin3.tang@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Kevin Tang The Unisoc DRM master device is a virtual device needed to list all DPU devices or other display interface nodes that comprise the graphics subsystem Unisoc's display pipeline have several components as below description, multi display controllers and corresponding physical interfaces. For different display scenarios, dpu0 and dpu1 maybe binding to different encoder. E.g: dpu0 and dpu1 both binding to DSI for dual mipi-dsi display; dpu0 binding to DSI for primary display, and dpu1 binding to DP for external display; Cc: Orson Zhai Cc: Chunyan Zhang Signed-off-by: Kevin Tang Reviewed-by: Rob Herring --- .../display/sprd/sprd,display-subsystem.yaml | 64 +++++++++++++++++++ 1 file changed, 64 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/sprd/sprd,display-subsystem.yaml diff --git a/Documentation/devicetree/bindings/display/sprd/sprd,display-subsystem.yaml b/Documentation/devicetree/bindings/display/sprd/sprd,display-subsystem.yaml new file mode 100644 index 000000000..3d107e943 --- /dev/null +++ b/Documentation/devicetree/bindings/display/sprd/sprd,display-subsystem.yaml @@ -0,0 +1,64 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/sprd/sprd,display-subsystem.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Unisoc DRM master device + +maintainers: + - Kevin Tang + +description: | + The Unisoc DRM master device is a virtual device needed to list all + DPU devices or other display interface nodes that comprise the + graphics subsystem. + + Unisoc's display pipeline have several components as below description, + multi display controllers and corresponding physical interfaces. + For different display scenarios, dpu0 and dpu1 maybe binding to different + encoder. + + E.g: + dpu0 and dpu1 both binding to DSI for dual mipi-dsi display; + dpu0 binding to DSI for primary display, and dpu1 binding to DP for external display; + + +-----------------------------------------+ + | | + | +---------+ | + +----+ | +----+ +---------+ |DPHY/CPHY| | +------+ + | +----->+dpu0+--->+MIPI|DSI +--->+Combo +----->+Panel0| + |AXI | | +----+ +---------+ +---------+ | +------+ + | | | ^ | + | | | | | + | | | +-----------+ | + | | | | | + |APB | | +--+-+ +-----------+ +---+ | +------+ + | +----->+dpu1+--->+DisplayPort+--->+PHY+--------->+Panel1| + | | | +----+ +-----------+ +---+ | +------+ + +----+ | | + +-----------------------------------------+ + +properties: + compatible: + const: sprd,display-subsystem + + ports: + $ref: /schemas/types.yaml#/definitions/phandle-array + description: + Should contain a list of phandles pointing to display interface port + of DPU devices. + +required: + - compatible + - ports + +additionalProperties: false + +examples: + - | + display-subsystem { + compatible = "sprd,display-subsystem"; + ports = <&dpu_out>; + }; + -- 2.29.0