MIME-Version: 1.0
Date:   Tue, 07 Dec 2021 19:42:27 +0000
From:   Marc Zyngier <maz@kernel.org>
To:     David Virag <virag.david003@gmail.com>
Cc:     Sam Protsenko <semen.protsenko@linaro.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>,
        Rob Herring <robh+dt@kernel.org>,
        Sylwester Nawrocki <s.nawrocki@samsung.com>,
        Tomasz Figa <tomasz.figa@gmail.com>,
        Chanwoo Choi <cw00.choi@samsung.com>,
        Michael Turquette <mturquette@baylibre.com>,
        Stephen Boyd <sboyd@kernel.org>,
        linux-arm-kernel@lists.infradead.org,
        linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org,
        linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org
Subject: Re: [PATCH v4 7/7] arm64: dts: exynos: Add initial device tree
 support for Exynos7885 SoC
In-Reply-To: <20211206153124.427102-8-virag.david003@gmail.com>
References: <20211206153124.427102-1-virag.david003@gmail.com>
 <20211206153124.427102-8-virag.david003@gmail.com>
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On 2021-12-06 15:31, David Virag wrote:
> Add initial Exynos7885 device tree nodes with dts for the Samsung 
> Galaxy
> A8 (2018), a.k.a. "jackpotlte", with model number "SM-A530F".
> Currently this includes some clock support, UART support, and I2C 
> nodes.
> 
> Signed-off-by: David Virag <virag.david003@gmail.com>

[...]

> +	psci {
> +		compatible = "arm,psci";
> +		method = "smc";
> +		cpu_suspend = <0xc4000001>;
> +		cpu_off = <0x84000002>;
> +		cpu_on = <0xc4000003>;

Aren't these the standard PSCI 0.2 function numbers? Can't you
make the compatible "arm,psci-0.2" instead?

> +	};
> +
> +	timer {
> +		compatible = "arm,armv8-timer";
> +		/* Hypervisor Virtual Timer interrupt is not wired to GIC */

I don't understand this comment. You seem to have a bunch of
ARMv8.0 cores, for which there is no such thing as a hypervisor
virtual timer (this is an ARMv8.1 addition).

> +		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | 
> IRQ_TYPE_LEVEL_LOW)>,
> +			     <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
> +			     <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
> +			     <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
> +	};

Thanks,

         M.
-- 
Jazz is not dead. It just smells funny...