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[104.57.184.186]) by smtp.gmail.com with ESMTPSA id bf17sm398304oib.27.2021.12.07.18.34.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 07 Dec 2021 18:34:16 -0800 (PST) Date: Tue, 7 Dec 2021 18:35:41 -0800 From: Bjorn Andersson To: Katherine Perez Cc: Vinod Koul , Andy Gross , Rob Herring , Felipe Balbi , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v2 2/2] arm64: dts: sm8350: fix tlmm base address Message-ID: References: <20211122190552.74073-1-kaperez@linux.microsoft.com> <20211122190552.74073-3-kaperez@linux.microsoft.com> <20211208022103.GA15963@linuxonhyperv3.guj3yctzbm1etfxqx2vob5hsef.xx.internal.cloudapp.net> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20211208022103.GA15963@linuxonhyperv3.guj3yctzbm1etfxqx2vob5hsef.xx.internal.cloudapp.net> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue 07 Dec 18:21 PST 2021, Katherine Perez wrote: > On Tue, Dec 07, 2021 at 05:16:14PM +0530, Vinod Koul wrote: > > On 30-11-21, 21:15, Bjorn Andersson wrote: > > > On Mon 22 Nov 22:03 CST 2021, Vinod Koul wrote: > > > > > > > On 22-11-21, 11:05, Katherine Perez wrote: > > > > > TLMM controller base address is incorrect and will hang on some platforms. > > > > > Fix by giving the correct address. > > > > > > > > Thanks, recheck the spec this looks correct. We should have tlmm reg > > > > space here and not tlmm base which also contains xpu region (thus hang) > > > > > > > > > > Aren't you reading the patch backwards? > > > > I guess :( > > > > > Afaict downstream the driver carries an offset of 0x100000, which we > > > dropped as we upstreamed the driver. As such changing reg to 0x0f000000 > > > should cause most gpio register accesses to fall outside the actual > > > register window. > > > > > > Or perhaps I'm missing something here? > > > > I relooked and XPU is at 0xF000000 and Reg at 0xF100000 > > So this patch should be dropped as such. The size mentioned in > > documentation is also correct > > > > Katherine, can you elaborate more on the hang you have observed? Any > > specific pins you use which causes this? > > Hi Vinod, > > Yes, it seems to hang in msm_pinctrl_probe. Specifically, line 734 in > gpiolib.c: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/gpio/gpiolib.c#n734. > On i=4, it hangs on assign_bit and the system goes into a reboot loop. > When I set the TLMM address to f000000, I don't see this issue at all. > The cause for that is quite likely that gc->get_direction() will read the configuration from gpio's registers and gpio4 in your system is reserved for use by some trusted application. When you change the TLMM address you avoid this problem by just reading random registers outside the region that contains protected registers. Adjust the gpio-reserved-ranges in your device's tlmm node to mark gpio4 (probably 4 pins long) as "invalid", gpiolib will then not touch them. Regards, Bjorn > > > > > > -- > > ~Vinod