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Wed, 8 Dec 2021 14:32:45 +0000 Received: from MRZP264MB2988.FRAP264.PROD.OUTLOOK.COM ([fe80::fc67:d895:7965:663f]) by MRZP264MB2988.FRAP264.PROD.OUTLOOK.COM ([fe80::fc67:d895:7965:663f%2]) with mapi id 15.20.4755.022; Wed, 8 Dec 2021 14:32:45 +0000 From: Christophe Leroy To: Benjamin Herrenschmidt , Paul Mackerras , Michael Ellerman CC: Christophe Leroy , "linux-kernel@vger.kernel.org" , "linuxppc-dev@lists.ozlabs.org" Subject: [PATCH 2/2] powerpc: Simplify and move arch_randomize_brk() Thread-Topic: [PATCH 2/2] powerpc: Simplify and move arch_randomize_brk() Thread-Index: AQHX7EB3EE2L+6Yk1kqjILMiGdDXTA== Date: Wed, 8 Dec 2021 14:32:45 +0000 Message-ID: <3c5ffa5d102c9edbfeec19072416b33b102fdabb.1638973836.git.christophe.leroy@csgroup.eu> References: In-Reply-To: Accept-Language: fr-FR, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=csgroup.eu; x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: fe428764-f7d8-4670-833e-08d9ba579a13 x-ms-traffictypediagnostic: MRXP264MB0357:EE_ x-microsoft-antispam-prvs: x-ms-oob-tlc-oobclassifiers: OLM:7691; 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charset="iso-8859-1" Content-Transfer-Encoding: 8BIT MIME-Version: 1.0 X-OriginatorOrg: csgroup.eu X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: MRZP264MB2988.FRAP264.PROD.OUTLOOK.COM X-MS-Exchange-CrossTenant-Network-Message-Id: fe428764-f7d8-4670-833e-08d9ba579a13 X-MS-Exchange-CrossTenant-originalarrivaltime: 08 Dec 2021 14:32:45.8859 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 9914def7-b676-4fda-8815-5d49fb3b45c8 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: eDNezULlxKUM9qMWQTaVnFTGkdbPNYIhl0NWIYjSu/pmwPGzUb1NQ08EQdfQh+u7y6+/+ciXm8gGk6y8QBDVULQS0+Ls1qmpfnVs3bHfLTs= X-MS-Exchange-Transport-CrossTenantHeadersStamped: MRXP264MB0357 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org arch_randomize_brk() is only needed for hash on book3s/64, for other platforms the one provided by the default mmap layout is good enough. Move it to hash_utils.c and use randomize_page() like the generic one. And properly opt out the radix case instead of making an assumption on mmu_highuser_ssize. Also change to a 32M range like most other architectures instead of 8M. Signed-off-by: Christophe Leroy --- Applies on top of series "powerpc: Make hash MMU code build configurable" arch/powerpc/kernel/process.c | 41 --------------------------- arch/powerpc/mm/book3s64/hash_utils.c | 19 +++++++++++++ 2 files changed, 19 insertions(+), 41 deletions(-) diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c index 984813a4d5dc..e7f809bdd433 100644 --- a/arch/powerpc/kernel/process.c +++ b/arch/powerpc/kernel/process.c @@ -34,10 +34,8 @@ #include #include #include -#include #include #include -#include #include #include @@ -2313,42 +2311,3 @@ unsigned long arch_align_stack(unsigned long sp) sp -= get_random_int() & ~PAGE_MASK; return sp & ~0xf; } - -static inline unsigned long brk_rnd(void) -{ - unsigned long rnd = 0; - - /* 8MB for 32bit, 1GB for 64bit */ - if (is_32bit_task()) - rnd = (get_random_long() % (1UL<<(23-PAGE_SHIFT))); - else - rnd = (get_random_long() % (1UL<<(30-PAGE_SHIFT))); - - return rnd << PAGE_SHIFT; -} - -unsigned long arch_randomize_brk(struct mm_struct *mm) -{ - unsigned long base = mm->brk; - unsigned long ret; - -#ifdef CONFIG_PPC_BOOK3S_64 - /* - * If we are using 1TB segments and we are allowed to randomise - * the heap, we can put it above 1TB so it is backed by a 1TB - * segment. Otherwise the heap will be in the bottom 1TB - * which always uses 256MB segments and this may result in a - * performance penalty. - */ - if (!radix_enabled() && !is_32bit_task() && (mmu_highuser_ssize == MMU_SEGSIZE_1T)) - base = max_t(unsigned long, mm->brk, 1UL << SID_SHIFT_1T); -#endif - - ret = PAGE_ALIGN(base + brk_rnd()); - - if (ret < mm->brk) - return mm->brk; - - return ret; -} - diff --git a/arch/powerpc/mm/book3s64/hash_utils.c b/arch/powerpc/mm/book3s64/hash_utils.c index eced266dc5e9..b179a001bfa4 100644 --- a/arch/powerpc/mm/book3s64/hash_utils.c +++ b/arch/powerpc/mm/book3s64/hash_utils.c @@ -37,6 +37,8 @@ #include #include #include +#include +#include #include #include @@ -2185,3 +2187,20 @@ void __init print_system_hash_info(void) if (htab_hash_mask) pr_info("htab_hash_mask = 0x%lx\n", htab_hash_mask); } + +unsigned long arch_randomize_brk(struct mm_struct *mm) +{ + /* + * If we are using 1TB segments and we are allowed to randomise + * the heap, we can put it above 1TB so it is backed by a 1TB + * segment. Otherwise the heap will be in the bottom 1TB + * which always uses 256MB segments and this may result in a + * performance penalty. + */ + if (is_32bit_task()) + return randomize_page(mm->brk, SZ_32M); + else if (!radix_enabled() && mmu_highuser_ssize == MMU_SEGSIZE_1T) + return randomize_page(max_t(unsigned long, mm->brk, SZ_1T), SZ_1G); + else + return randomize_page(mm->brk, SZ_1G); +} -- 2.33.1