Date:   Fri, 10 Dec 2021 13:19:47 -0300
From:   Arnaldo Carvalho de Melo <arnaldo.melo@gmail.com>
To:     German Gomez <german.gomez@arm.com>,
        Arnaldo Carvalho de Melo <acme@kernel.org>,
        kajoljain <kjain@linux.ibm.com>
CC:     linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org,
        John Garry <john.garry@huawei.com>,
        Will Deacon <will@kernel.org>,
        Mathieu Poirier <mathieu.poirier@linaro.org>,
        Leo Yan <leo.yan@linaro.org>,
        Mark Rutland <mark.rutland@arm.com>,
        Alexander Shishkin <alexander.shishkin@linux.intel.com>,
        Jiri Olsa <jolsa@redhat.com>,
        Namhyung Kim <namhyung@kernel.org>,
        linux-arm-kernel@lists.infradead.org, linux-csky@vger.kernel.org,
        linux-riscv@lists.infradead.org
Subject: =?US-ASCII?Q?Re=3A_=5BPATCH_v1_1/4=5D_perf_tools=3A_Preve?= =?US-ASCII?Q?nt_out-of-bounds_access_to_registers?=
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On December 10, 2021 12:28:56 PM GMT-03:00, German Gomez <german=2Egomez@a=
rm=2Ecom> wrote:
>
>On 10/12/2021 13:38, Arnaldo Carvalho de Melo wrote:
>> Em Fri, Dec 10, 2021 at 02:47:49PM +0530, kajoljain escreveu:
>>>
>>> On 12/1/21 6:03 PM, German Gomez wrote:
>>>> The size of the cache of register values is arch-dependant
>>>> (PERF_REGS_MAX)=2E This has the potential of causing an out-of-bounds
>>>> access in the function "perf_reg_value" if the local architecture
>>>> contains less registers than the one the perf=2Edata file was recorde=
d on=2E
>>>>
>>>> Since the maximum number of registers is bound by the bitmask "u64
>>>> cache_mask", and the size of the cache when running under x86 systems=
 is
>>>> 64 already, fix the size to 64 and add a range-check to the function
>>>> "perf_reg_value" to prevent out-of-bounds access=2E
>>>>
>>> Patch looks good to me=2E
>>>
>>> Reviewed-by: Kajol Jain<kjain@linux=2Eibm=2Ecom>
>> Thanks, applied=2E
>>
>> - Arnaldo
>
>Thanks Arnaldo, and the rest for the review=2E
>
>I did send a v2 of this patch afterwards=2E The only difference was to
>give credit to the reporter in the commit message with:
>
>Reported-by: Alexandre Truong <alexandre=2Etruong@arm=2Ecom>


I'll add it=2E

- Arnaldo
>
>Thanks,
>German
>
>> =20
>>> Thanks,
>>> Kajol Jain
>>>
>>>> Signed-off-by: German Gomez <german=2Egomez@arm=2Ecom>
>>>> ---
>>>>  tools/perf/util/event=2Eh     | 5 ++++-
>>>>  tools/perf/util/perf_regs=2Ec | 3 +++
>>>>  2 files changed, 7 insertions(+), 1 deletion(-)
>>>>
>>>> diff --git a/tools/perf/util/event=2Eh b/tools/perf/util/event=2Eh
>>>> index 95ffed663=2E=2Ec59331eea 100644
>>>> --- a/tools/perf/util/event=2Eh
>>>> +++ b/tools/perf/util/event=2Eh
>>>> @@ -44,13 +44,16 @@ struct perf_event_attr;
>>>>  /* perf sample has 16 bits size limit */
>>>>  #define PERF_SAMPLE_MAX_SIZE (1 << 16)
>>>> =20
>>>> +/* number of register is bound by the number of bits in regs_dump::m=
ask (64) */
>>>> +#define PERF_SAMPLE_REGS_CACHE_SIZE (8 * sizeof(u64))
>>>> +
>>>>  struct regs_dump {
>>>>  	u64 abi;
>>>>  	u64 mask;
>>>>  	u64 *regs;
>>>> =20
>>>>  	/* Cached values/mask filled by first register access=2E */
>>>> -	u64 cache_regs[PERF_REGS_MAX];
>>>> +	u64 cache_regs[PERF_SAMPLE_REGS_CACHE_SIZE];
>>>>  	u64 cache_mask;
>>>>  };
>>>> =20
>>>> diff --git a/tools/perf/util/perf_regs=2Ec b/tools/perf/util/perf_reg=
s=2Ec
>>>> index 5ee47ae15=2E=2E06a7461ba 100644
>>>> --- a/tools/perf/util/perf_regs=2Ec
>>>> +++ b/tools/perf/util/perf_regs=2Ec
>>>> @@ -25,6 +25,9 @@ int perf_reg_value(u64 *valp, struct regs_dump *reg=
s, int id)
>>>>  	int i, idx =3D 0;
>>>>  	u64 mask =3D regs->mask;
>>>> =20
>>>> +	if ((u64)id >=3D PERF_SAMPLE_REGS_CACHE_SIZE)
>>>> +		return -EINVAL;
>>>> +
>>>>  	if (regs->cache_mask & (1ULL << id))
>>>>  		goto out;
>>>> =20
>>>>