Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6A11BC433EF for ; Mon, 13 Dec 2021 10:08:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S242330AbhLMKH1 (ORCPT ); Mon, 13 Dec 2021 05:07:27 -0500 Received: from sin.source.kernel.org ([145.40.73.55]:49818 "EHLO sin.source.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240474AbhLMKB6 (ORCPT ); Mon, 13 Dec 2021 05:01:58 -0500 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by sin.source.kernel.org (Postfix) with ESMTPS id 64D72CE0F60; Mon, 13 Dec 2021 10:01:56 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 0D9B5C34600; Mon, 13 Dec 2021 10:01:53 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linuxfoundation.org; s=korg; t=1639389714; bh=u0AtQoLqwH2s+1c8fUnA2GJ5fF1TZkWccvA58DJuqQM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=H3d+2pJbckvYqNTVu56gdm/o8McBRVOP37O0wCdCiWEiC8RMUPcwY0qBiONQTALm9 G5ZtTV89qF2nZ/6YN4sCpkeeNpkTZ7XQR2F72Nkm8EEgvGlPPb459vjuklUd6Searw TJAlYCz0GMdrYu5bp/+BOFnS3II6tvNfFdnohOqw= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Billy Tsai , Joel Stanley , Marc Zyngier Subject: [PATCH 5.15 163/171] irqchip/aspeed-scu: Replace update_bits with write_bits. Date: Mon, 13 Dec 2021 10:31:18 +0100 Message-Id: <20211213092950.497257971@linuxfoundation.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20211213092945.091487407@linuxfoundation.org> References: <20211213092945.091487407@linuxfoundation.org> User-Agent: quilt/0.66 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Billy Tsai commit 8958389681b929fcc7301e7dc5f0da12e4a256a0 upstream. The interrupt status bits are cleared by writing 1, we should force a write to clear the interrupt without checking if the value has changed. Fixes: 04f605906ff0 ("irqchip: Add Aspeed SCU interrupt controller") Signed-off-by: Billy Tsai Reviewed-by: Joel Stanley Signed-off-by: Marc Zyngier Link: https://lore.kernel.org/r/20211124094348.11621-1-billy_tsai@aspeedtech.com Cc: stable@vger.kernel.org Signed-off-by: Greg Kroah-Hartman --- drivers/irqchip/irq-aspeed-scu-ic.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) --- a/drivers/irqchip/irq-aspeed-scu-ic.c +++ b/drivers/irqchip/irq-aspeed-scu-ic.c @@ -76,8 +76,8 @@ static void aspeed_scu_ic_irq_handler(st generic_handle_domain_irq(scu_ic->irq_domain, bit - scu_ic->irq_shift); - regmap_update_bits(scu_ic->scu, scu_ic->reg, mask, - BIT(bit + ASPEED_SCU_IC_STATUS_SHIFT)); + regmap_write_bits(scu_ic->scu, scu_ic->reg, mask, + BIT(bit + ASPEED_SCU_IC_STATUS_SHIFT)); } chained_irq_exit(chip, desc);