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Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB03.amd.com; Received: from SATLEXMB03.amd.com (165.204.84.17) by DM6NAM11FT040.mail.protection.outlook.com (10.13.173.133) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.4778.13 via Frontend Transport; Mon, 13 Dec 2021 11:32:16 +0000 Received: from sos-ubuntu2004-quartz01.amd.com (10.180.168.240) by SATLEXMB03.amd.com (10.181.40.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.17; Mon, 13 Dec 2021 05:32:15 -0600 From: Suravee Suthikulpanit To: , , CC: , , , , , , , , , , , Suravee Suthikulpanit Subject: [PATCH v3 0/3] svm: avic: Allow AVIC support on system w/ physical APIC ID > 255 Date: Mon, 13 Dec 2021 05:31:07 -0600 Message-ID: <20211213113110.12143-1-suravee.suthikulpanit@amd.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB03.amd.com (10.181.40.144) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: efcc6290-26bb-465c-0062-08d9be2c3746 X-MS-TrafficTypeDiagnostic: DM6PR12MB3930:EE_ X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:7219; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Dec 2021 11:32:16.4015 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: efcc6290-26bb-465c-0062-08d9be2c3746 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT040.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR12MB3930 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Originally, AMD SVM AVIC supports 8-bit host physical APIC ID. However, newer AMD systems can have physical APIC ID larger than 255, and AVIC hardware has been extended to support upto the maximum physical APIC ID available in the system. This series introduces a helper function in the APIC subsystem to get the maximum physical APIC ID allowing the SVM AVIC driver to calculate the number of bits to program the host physical APIC ID in the AVIC physical APIC ID table entry. Regards, Suravee Suthikulpanit Changes from V2 (https://www.spinics.net/lists/kvm/msg261351.html) * Use global variable npt_enabled instead (patch 1/3) * Use BIT_ULL() instead of BIT() since avic_host_physical_id_mask is 64-bit value (patch 3/3) Suravee Suthikulpanit (3): KVM: SVM: Refactor AVIC hardware setup logic into helper function x86/apic: Add helper function to get maximum physical APIC ID KVM: SVM: Extend host physical APIC ID field to support more than 8-bit arch/x86/include/asm/apic.h | 1 + arch/x86/kernel/apic/apic.c | 6 ++++++ arch/x86/kvm/svm/avic.c | 38 +++++++++++++++++++++++++++++-------- arch/x86/kvm/svm/svm.c | 8 +------- arch/x86/kvm/svm/svm.h | 2 +- 5 files changed, 39 insertions(+), 16 deletions(-) -- 2.25.1