From:   Will Deacon <will@kernel.org>
To:     sgoutham@marvell.com, bbhushan2@marvell.com,
        Bhaskara Budiredla <bbudiredla@marvell.com>,
        mark.rutland@arm.com, robh+dt@kernel.org
Cc:     catalin.marinas@arm.com, kernel-team@android.com,
        Will Deacon <will@kernel.org>, linux-kernel@vger.kernel.org,
        linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org
Subject: Re: [PATCH v7 0/2] drivers: perf: Add Marvell CN10K LLC-TAD pmu driver
Date:   Tue, 14 Dec 2021 14:04:32 +0000
Message-Id: <163948458175.3584506.7943620757309501715.b4-ty@kernel.org>
In-Reply-To: <20211115043506.6679-1-bbudiredla@marvell.com>
References: <20211115043506.6679-1-bbudiredla@marvell.com>
MIME-Version: 1.0
Content-Type: text/plain; charset="utf-8"
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Precedence: bulk

On Mon, 15 Nov 2021 10:05:04 +0530, Bhaskara Budiredla wrote:
> This series introduces performance monitor driver to Last-level-cache
> tag-and-data (LLC-TAD) PMU which is an integral part of Marvell CN10K SoCs.
> The configuration and functionality of the TAD PMU is covered in patch 1.
> The device tree bindings are dealt in patch 2.
> 
> v7:
>  - use braces around a multi-line conditional statement (Will Deacon)
>  - remove mask doesn't do anything (Will Deacon)
>  - restrict compile test dependency to aarch64
> 
> [...]

Applied to arm64 (for-next/perf-cn10k), thanks!

[1/2] drivers: perf: Add LLC-TAD perf counter support
      https://git.kernel.org/arm64/c/036a7584bede
[2/2] dt-bindings: perf: Add YAML schemas for Marvell CN10K LLC-TAD pmu bindings
      https://git.kernel.org/arm64/c/4cbf47728f8d

Cheers,
-- 
Will

https://fixes.arm64.dev
https://next.arm64.dev
https://will.arm64.dev