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[81.172.62.207]) by smtp.gmail.com with ESMTPSA id m17sm2676457wrw.11.2021.12.15.11.22.58 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 15 Dec 2021 11:22:58 -0800 (PST) Message-ID: Date: Wed, 15 Dec 2021 20:22:57 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.2.0 Subject: Re: [PATCH net-next v8 3/6] arm64: dts: mt2712: update ethernet device node Content-Language: en-US To: Biao Huang , davem@davemloft.net, Jakub Kicinski , Rob Herring Cc: Giuseppe Cavallaro , Alexandre Torgue , Jose Abreu , Maxime Coquelin , netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com, srv_heupstream@mediatek.com, macpaul.lin@mediatek.com, angelogioacchino.delregno@collabora.com, dkirjanov@suse.de References: <20211210013129.811-1-biao.huang@mediatek.com> <20211210013129.811-4-biao.huang@mediatek.com> From: Matthias Brugger In-Reply-To: <20211210013129.811-4-biao.huang@mediatek.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 10/12/2021 02:31, Biao Huang wrote: > Since there are some changes in ethernet driver, > update ethernet device node in dts to accommodate to it. > I have a hard time to understand how the first two patches are related to this one. Please be more specific in your commit message. Also please beware that we should make sure that a newer driver version should still work properly with an older device tree, which does not have your changes. Regards, Matthias > Signed-off-by: Biao Huang > --- > arch/arm64/boot/dts/mediatek/mt2712-evb.dts | 1 + > arch/arm64/boot/dts/mediatek/mt2712e.dtsi | 14 +++++++++----- > 2 files changed, 10 insertions(+), 5 deletions(-) > > diff --git a/arch/arm64/boot/dts/mediatek/mt2712-evb.dts b/arch/arm64/boot/dts/mediatek/mt2712-evb.dts > index 7d369fdd3117..11aa135aa0f3 100644 > --- a/arch/arm64/boot/dts/mediatek/mt2712-evb.dts > +++ b/arch/arm64/boot/dts/mediatek/mt2712-evb.dts > @@ -110,6 +110,7 @@ ð { > phy-handle = <ðernet_phy0>; > mediatek,tx-delay-ps = <1530>; > snps,reset-gpio = <&pio 87 GPIO_ACTIVE_LOW>; > + snps,reset-delays-us = <0 10000 10000>; > pinctrl-names = "default", "sleep"; > pinctrl-0 = <ð_default>; > pinctrl-1 = <ð_sleep>; > diff --git a/arch/arm64/boot/dts/mediatek/mt2712e.dtsi b/arch/arm64/boot/dts/mediatek/mt2712e.dtsi > index a9cca9c146fd..9e850e04fffb 100644 > --- a/arch/arm64/boot/dts/mediatek/mt2712e.dtsi > +++ b/arch/arm64/boot/dts/mediatek/mt2712e.dtsi > @@ -726,7 +726,7 @@ queue2 { > }; > > eth: ethernet@1101c000 { > - compatible = "mediatek,mt2712-gmac"; > + compatible = "mediatek,mt2712-gmac", "snps,dwmac-4.20a"; > reg = <0 0x1101c000 0 0x1300>; > interrupts = ; > interrupt-names = "macirq"; > @@ -734,15 +734,19 @@ eth: ethernet@1101c000 { > clock-names = "axi", > "apb", > "mac_main", > - "ptp_ref"; > + "ptp_ref", > + "rmii_internal"; > clocks = <&pericfg CLK_PERI_GMAC>, > <&pericfg CLK_PERI_GMAC_PCLK>, > <&topckgen CLK_TOP_ETHER_125M_SEL>, > - <&topckgen CLK_TOP_ETHER_50M_SEL>; > + <&topckgen CLK_TOP_ETHER_50M_SEL>, > + <&topckgen CLK_TOP_ETHER_50M_RMII_SEL>; > assigned-clocks = <&topckgen CLK_TOP_ETHER_125M_SEL>, > - <&topckgen CLK_TOP_ETHER_50M_SEL>; > + <&topckgen CLK_TOP_ETHER_50M_SEL>, > + <&topckgen CLK_TOP_ETHER_50M_RMII_SEL>; > assigned-clock-parents = <&topckgen CLK_TOP_ETHERPLL_125M>, > - <&topckgen CLK_TOP_APLL1_D3>; > + <&topckgen CLK_TOP_APLL1_D3>, > + <&topckgen CLK_TOP_ETHERPLL_50M>; > power-domains = <&scpsys MT2712_POWER_DOMAIN_AUDIO>; > mediatek,pericfg = <&pericfg>; > snps,axi-config = <&stmmac_axi_setup>; >