Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BBCAFC433FE for ; Thu, 16 Dec 2021 05:53:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231534AbhLPFxh (ORCPT ); Thu, 16 Dec 2021 00:53:37 -0500 Received: from mailgw02.mediatek.com ([210.61.82.184]:41082 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S231216AbhLPFxe (ORCPT ); Thu, 16 Dec 2021 00:53:34 -0500 X-UUID: 101fca8982ee46e7aec884725b21e306-20211216 X-UUID: 101fca8982ee46e7aec884725b21e306-20211216 Received: from mtkmbs10n2.mediatek.inc [(172.21.101.183)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 826440103; Thu, 16 Dec 2021 13:53:32 +0800 Received: from mtkcas10.mediatek.inc (172.21.101.39) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.792.3; Thu, 16 Dec 2021 13:53:31 +0800 Received: from mhfsdcap04.gcn.mediatek.inc (10.17.3.154) by mtkcas10.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Thu, 16 Dec 2021 13:53:29 +0800 From: Biao Huang To: , Jakub Kicinski , Rob Herring CC: Matthias Brugger , Giuseppe Cavallaro , Alexandre Torgue , Jose Abreu , Maxime Coquelin , Biao Huang , , , , , , , , , , Subject: [PATCH net-next v10 1/6] stmmac: dwmac-mediatek: add platform level clocks management Date: Thu, 16 Dec 2021 13:53:23 +0800 Message-ID: <20211216055328.15953-2-biao.huang@mediatek.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211216055328.15953-1-biao.huang@mediatek.com> References: <20211216055328.15953-1-biao.huang@mediatek.com> MIME-Version: 1.0 Content-Transfer-Encoding: 7BIT Content-Type: text/plain; charset=US-ASCII X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This patch implements clks_config callback for dwmac-mediatek platform, which could support platform level clocks management. Signed-off-by: Biao Huang Acked-by: AngeloGioacchino Del Regno --- .../ethernet/stmicro/stmmac/dwmac-mediatek.c | 25 +++++++++++++------ 1 file changed, 18 insertions(+), 7 deletions(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c index 58c0feaa8131..0ff57c268dca 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c @@ -9,7 +9,6 @@ #include #include #include -#include #include #include @@ -359,9 +358,6 @@ static int mediatek_dwmac_init(struct platform_device *pdev, void *priv) return ret; } - pm_runtime_enable(&pdev->dev); - pm_runtime_get_sync(&pdev->dev); - return 0; } @@ -370,11 +366,25 @@ static void mediatek_dwmac_exit(struct platform_device *pdev, void *priv) struct mediatek_dwmac_plat_data *plat = priv; clk_bulk_disable_unprepare(plat->num_clks_to_config, plat->clks); - - pm_runtime_put_sync(&pdev->dev); - pm_runtime_disable(&pdev->dev); } +static int mediatek_dwmac_clks_config(void *priv, bool enabled) +{ + struct mediatek_dwmac_plat_data *plat = priv; + int ret = 0; + + if (enabled) { + ret = clk_bulk_prepare_enable(plat->num_clks_to_config, plat->clks); + if (ret) { + dev_err(plat->dev, "failed to enable clks, err = %d\n", ret); + return ret; + } + } else { + clk_bulk_disable_unprepare(plat->num_clks_to_config, plat->clks); + } + + return ret; +} static int mediatek_dwmac_probe(struct platform_device *pdev) { struct mediatek_dwmac_plat_data *priv_plat; @@ -420,6 +430,7 @@ static int mediatek_dwmac_probe(struct platform_device *pdev) plat_dat->bsp_priv = priv_plat; plat_dat->init = mediatek_dwmac_init; plat_dat->exit = mediatek_dwmac_exit; + plat_dat->clks_config = mediatek_dwmac_clks_config; mediatek_dwmac_init(pdev, priv_plat); ret = stmmac_dvr_probe(&pdev->dev, plat_dat, &stmmac_res); -- 2.25.1