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References: <20210925203224.10419-1-sergio.paracuellos@gmail.com>
 <20210925203224.10419-6-sergio.paracuellos@gmail.com>
 <67687e579e633d42dc501cfb6746c1cb9f600112.camel@mengyan1223.wang>
Date:   Thu, 16 Dec 2021 13:07:43 +0000
From:   "Jiaxun Yang" <jiaxun.yang@flygoat.com>
To:     "Xi Ruoyao" <xry111@mengyan1223.wang>,
        "Sergio Paracuellos" <sergio.paracuellos@gmail.com>,
        "Thomas Bogendoerfer" <tsbogend@alpha.franken.de>
Cc:     robh@kernel.org, "Arnd Bergmann" <arnd@arndb.de>,
        catalin.marinas@arm.com, Liviu.Dudau@arm.com,
        "Bjorn Helgaas" <bhelgaas@google.com>, matthias.bgg@gmail.com,
        "Greg Kroah-Hartman" <gregkh@linuxfoundation.org>,
        "linux-mips@vger.kernel.org" <linux-mips@vger.kernel.org>,
        linux-pci <linux-pci@vger.kernel.org>,
        linux-staging@lists.linux.dev, neil@brown.name,
        linux-kernel@vger.kernel.org
Subject: Re: [PATCH v3 5/6] MIPS: implement architecture-specific 'pci_remap_iospace()'
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=E5=9C=A82021=E5=B9=B412=E6=9C=8816=E6=97=A5=E5=8D=81=E4=BA=8C=E6=9C=88 =
=E4=B8=8A=E5=8D=8811:44=EF=BC=8CXi Ruoyao=E5=86=99=E9=81=93=EF=BC=9A
> On Sat, 2021-09-25 at 22:32 +0200, Sergio Paracuellos wrote:
>> To make PCI IO work we need to properly virtually map IO cpu physical=
 address
>> and set this virtual address as the address of the first PCI IO port =
which
>> is set using function 'set_io_port_base()'.
>>=20
>> Acked-by: Arnd Bergmann <arnd@arndb.de>
>> Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
>
> Hi,
>
> the change is causing a WARNING on loongson64g-4core-ls7a:
>
> [    0.105781] loongson-pci 1a000000.pci:       IO=20
> 0x0018020000..0x001803ffff ->
>  0x0000020000
> [    0.105792] loongson-pci 1a000000.pci:      MEM=20
> 0x0040000000..0x007fffffff ->
>  0x0040000000
> [    0.105801] ------------[ cut here ]------------
> [    0.105804] WARNING: CPU: 0 PID: 1 at arch/mips/pci/pci-generic.c:5=
5=20
> pci_remap_iospace+0x80/0x88
> [    0.105815] resource start address is not zero
>
> I'm not sure how to fix this one.
>
>> ---
>> =C2=A0arch/mips/include/asm/pci.h |=C2=A0 2 ++
>> =C2=A0arch/mips/pci/pci-generic.c | 14 ++++++++++++++
>> =C2=A02 files changed, 16 insertions(+)
>>=20
>> diff --git a/arch/mips/include/asm/pci.h b/arch/mips/include/asm/pci.h
>> index 9ffc8192adae..35270984a5f0 100644
>> --- a/arch/mips/include/asm/pci.h
>> +++ b/arch/mips/include/asm/pci.h
>> @@ -20,6 +20,8 @@
>> =C2=A0#include <linux/list.h>
>> =C2=A0#include <linux/of.h>
>> =C2=A0
>> +#define pci_remap_iospace pci_remap_iospace
>> +
>> =C2=A0#ifdef CONFIG_PCI_DRIVERS_LEGACY
>> =C2=A0
>> =C2=A0/*
>> diff --git a/arch/mips/pci/pci-generic.c b/arch/mips/pci/pci-generic.c
>> index 95b00017886c..18eb8a453a86 100644
>> --- a/arch/mips/pci/pci-generic.c
>> +++ b/arch/mips/pci/pci-generic.c
>> @@ -46,3 +46,17 @@ void pcibios_fixup_bus(struct pci_bus *bus)
>> =C2=A0{
>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0pci_read_bridge_bases=
(bus);
>> =C2=A0}
>> +
>> +int pci_remap_iospace(const struct resource *res, phys_addr_t phys_a=
ddr)
>> +{
>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0unsigned long vaddr;
>> +
>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0if (res->start !=3D 0) {
>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=
=A0=C2=A0=C2=A0=C2=A0WARN_ONCE(1, "resource start address is not zero\n"=
);
>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=
=A0=C2=A0=C2=A0=C2=A0return -ENODEV;
>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0}
>> +
>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0vaddr =3D (unsigned long)i=
oremap(phys_addr, resource_size(res));
>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0set_io_port_base(vaddr);
>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0return 0;
>> +}

Hi all,

Another way could be keeping a linked list about PIO->PHYS mapping inste=
ad of using the single io_port_base variable.

Thanks.

>
> --=20
> Xi Ruoyao <xry111@mengyan1223.wang>
> School of Aerospace Science and Technology, Xidian University

--=20
- Jiaxun