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References: <20211216165851.64708-1-reinhold.mueller@emtrion.com> <20211216165851.64708-3-reinhold.mueller@emtrion.com>
In-Reply-To: <20211216165851.64708-3-reinhold.mueller@emtrion.com>
From:   Fabio Estevam <festevam@gmail.com>
Date:   Thu, 16 Dec 2021 14:18:37 -0300
Message-ID: <CAOMZO5C346Om3QS19RQB3EzPu9Ey2b1jt_V_hzOZCk6bEd9wtQ@mail.gmail.com>
Subject: Re: [PATCH v3 2/2] arm64: dts: imx8mm: Add support for emtrion
 emCON-MX8M Mini
To:     reinhold.mueller@emtrion.com
Cc:     Shawn Guo <shawnguo@kernel.org>, Rob Herring <robh+dt@kernel.org>,
        Sascha Hauer <s.hauer@pengutronix.de>,
        Sascha Hauer <kernel@pengutronix.de>,
        NXP Linux Team <linux-imx@nxp.com>,
        "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" 
        <devicetree@vger.kernel.org>,
        linux-kernel <linux-kernel@vger.kernel.org>
Content-Type: text/plain; charset="UTF-8"
Precedence: bulk

Hi Reinhold,

On Thu, Dec 16, 2021 at 1:59 PM <reinhold.mueller@emtrion.com> wrote:

> +       reserved-memory {
> +               #address-cells = <2>;
> +               #size-cells = <2>;
> +               ranges;
> +
> +               rpmsg_reserved: rpmsg@b8000000 {
> +                       no-map;
> +                       reg = <0 0xb8000000 0 0x400000>;
> +               };
> +
> +               loader_reserved: loader@bb700000 {
> +                       no-map;
> +                       reg = <0 0xbb700000 0x0 0x00100000>;
> +               };
> +
> +               pci_reserved: pci@bb800000 {
> +                       no-map;
> +                       reg = <0 0xbb800000 0x0 0x00200000>;
> +               };
> +
> +               ivshmem2_reserved: ivshmem2@bba00000 {
> +                       no-map;
> +                       reg = <0 0xbba00000 0x0 0x00100000>;
> +               };
> +
> +               ivshmem_reserved: ivshmem@bbb00000 {
> +                       no-map;
> +                       reg = <0 0xbbb00000 0x0 0x00100000>;
> +               };
> +       };

Are these reserved nodes needed with mainline?

Looks like they are remnants from NXP vendor BSP.

> +&fec1 {
> +       pinctrl-names = "default";
> +       pinctrl-0 = <&pinctrl_fec1>;
> +       phy-mode = "rgmii-id";
> +       phy-reset-gpios = <&gpio1 9 0>;

phy-reset-gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;

Actually, phy-reset-gpios is considered deprecated.

You could also add an mdio node as fec child and:
add reset-gpios = <&gpio1 9 GPIO_ACTIVE_LOW>; there.